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authorMaxime Ripard <maxime.ripard@free-electrons.com>2012-11-16 21:21:43 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2012-11-16 21:46:39 +0100
commit404525d5a7ecc847b5ac178dad96402f1e102ccc (patch)
tree6a1eb744d54f1d43734f65899e2e720010d0fb48 /drivers/clk/Makefile
parent77b67063bb6bce6d475e910d3b886a606d0d91f7 (diff)
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Mike Turquette <mturquette@ti.com>
Diffstat (limited to 'drivers/clk/Makefile')
-rw-r--r--drivers/clk/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 71a25b91de00..9c300a828ede 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -19,6 +19,7 @@ endif
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
+obj-$(CONFIG_ARCH_SUNXI) += clk-sunxi.o
# Chip specific
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o