ENGR00126057-2 MX50 Add RNGB support

Machine layer modifications for RNGB device

Signed-off-by: Anish Trivedi <anish@freescale.com>

6 files changed, 37 insertions, 0 deletions

diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 2795773086e7..e5c8201c3396 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -9,6 +9,7 @@ config ARCH_MX53
 
 config ARCH_MX50
 	bool
+	select ARCH_HAS_RNGC
 
 config FORCE_MAX_ZONEORDER
     int "MAX_ORDER"
diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c
index eb98d3ac9bd3..571908fc2d12 100644
--- a/arch/arm/mach-mx5/clock_mx50.c
+++ b/arch/arm/mach-mx5/clock_mx50.c
@@ -2322,6 +2322,16 @@ static struct clk rtc_clk = {
 	.disable = _clk_disable,
 };
 
+struct clk rng_clk = {
+	.name = "rng_clk",
+	.id = 0,
+	.parent = &ipg_clk,
+	.enable = _clk_enable,
+	.enable_reg = MXC_CCM_CCGR7,
+	.enable_shift = MXC_CCM_CCGR7_CG1_OFFSET,
+	.disable = _clk_disable,
+};
+
 static struct clk owire_clk = {
 	/* 1w driver come from upstream and use owire as clock name*/
 	.name = "owire",
@@ -3043,6 +3053,7 @@ static struct clk *mxc_clks[] = {
 	&ddr_clk,
 	&pgc_clk,
 	&rtc_clk,
+	&rng_clk,
 	&owire_clk,
 	&fec_clk[0],
 	&fec_clk[1],
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
index dbc0e65dbe30..e80446bc581f 100644
--- a/arch/arm/mach-mx5/devices.c
+++ b/arch/arm/mach-mx5/devices.c
@@ -473,6 +473,25 @@ struct platform_device mxcscc_device = {
 	.resource = scc_resources,
 };
 
+static struct resource rngb_resources[] = {
+	{
+		.start = RNGB_BASE_ADDR,
+		.end = RNGB_BASE_ADDR + SZ_4K - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	{
+		.start = MXC_INT_RNGB_BLOCK,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+/* the RNGC driver applies for MX50's RNGB hw */
+struct platform_device mxc_rngb_device = {
+	.name = "fsl_rngc",
+	.id = 0,
+	.num_resources = ARRAY_SIZE(rngb_resources),
+	.resource = rngb_resources,
+};
 
 static struct resource mxc_fec_resources[] = {
 	{
@@ -1608,6 +1627,8 @@ int __init mxc_init_devices(void)
 		scc_resources[0].end -= MX53_OFFSET;
 		scc_resources[1].start = MX53_SCC_RAM_BASE_ADDR;
 		scc_resources[1].end = MX53_SCC_RAM_BASE_ADDR + SZ_16K - 1;
+		rngb_resources[0].start -= MX53_OFFSET;
+		rngb_resources[0].end -= MX53_OFFSET;
 		mxcspi1_resources[0].start -= MX53_OFFSET;
 		mxcspi1_resources[0].end -= MX53_OFFSET;
 		mxcspi2_resources[0].start -= MX53_OFFSET;
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
index e33a2cb60739..f7517fb8083d 100644
--- a/arch/arm/mach-mx5/devices.h
+++ b/arch/arm/mach-mx5/devices.h
@@ -75,3 +75,4 @@ extern struct platform_device mxc_v4l2out_device;
 extern struct platform_device mxs_viim;
 extern struct platform_device mxs_dma_apbh_device;
 extern struct platform_device gpmi_nfc_device;
+extern struct platform_device mxc_rngb_device;
diff --git a/arch/arm/mach-mx5/mx50_arm2.c b/arch/arm/mach-mx5/mx50_arm2.c
index 711ebe229e5f..62ba3c244cbb 100644
--- a/arch/arm/mach-mx5/mx50_arm2.c
+++ b/arch/arm/mach-mx5/mx50_arm2.c
@@ -863,6 +863,8 @@ static void __init mxc_board_init(void)
 	mxc_register_device(&gpmi_nfc_device, &gpmi_nfc_platform_data);
 	mx5_usb_dr_init();
 	mx5_usbh1_init();
+
+	mxc_register_device(&mxc_rngb_device, NULL);
 }
 
 static void __init mx50_arm2_timer_init(void)
diff --git a/arch/arm/plat-mxc/include/mach/mx5x.h b/arch/arm/plat-mxc/include/mach/mx5x.h
index e3ad28a9fe2a..16782ca58d41 100644
--- a/arch/arm/plat-mxc/include/mach/mx5x.h
+++ b/arch/arm/plat-mxc/include/mach/mx5x.h
@@ -240,6 +240,7 @@
 #define MX53_ATA_BASE_ADDR	(AIPS1_BASE_ADDR + 0x000E8000)
 #define I2C3_BASE_ADDR		(AIPS1_BASE_ADDR + 0x000EC000)
 #define UART4_BASE_ADDR	(AIPS1_BASE_ADDR + 0x000F0000)
+#define RNGB_BASE_ADDR		(AIPS1_BASE_ADDR + 0x000F8000) /* MX50 */
 
 #define DVFSCORE_BASE_ADDR 	(GPC_BASE_ADDR + 0x180)
 #define DVFSPER_BASE_ADDR 		(GPC_BASE_ADDR + 0x1C4)