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authorNicolas Pitre <nico@cam.org>2005-11-08 22:43:06 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-11-08 22:43:06 +0000
commit5285eb57c9a20d8df2569c770ff6048c3202cc91 (patch)
tree51fa28b1941def4d0ec92f7cd4046ffa2c0bc63d /arch
parentd07ad967e3c1cb955c4f9ee6a4eba4e6e1edb1e8 (diff)
[ARM] 3135/1: harden SA11x0 and PXA2xx timer init code
Patch from Nicolas Pitre Make it completely deterministic and leave nothing to chance (even if it had at worst 0.001% probability of failing). Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-pxa/time.c8
-rw-r--r--arch/arm/mach-sa1100/time.c8
2 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 7dad3f1465e0..b9b2057349eb 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -132,11 +132,13 @@ static void __init pxa_timer_init(void)
tv.tv_sec = pxa_get_rtc_time();
do_settimeofday(&tv);
- OSMR0 = 0; /* set initial match at 0 */
+ OIER = 0; /* disable any timer interrupts */
+ OSCR = LATCH*2; /* push OSCR out of the way */
+ OSMR0 = LATCH; /* set initial match */
OSSR = 0xf; /* clear status on all timers */
setup_irq(IRQ_OST0, &pxa_timer_irq);
- OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
- OSCR = 0; /* initialize free-running timer, force first match */
+ OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
+ OSCR = 0; /* initialize free-running timer */
}
#ifdef CONFIG_NO_IDLE_HZ
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 47e0420623fc..e4b435e634e4 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -124,11 +124,13 @@ static void __init sa1100_timer_init(void)
tv.tv_sec = sa1100_get_rtc_time();
do_settimeofday(&tv);
- OSMR0 = 0; /* set initial match at 0 */
+ OIER = 0; /* disable any timer interrupts */
+ OSCR = LATCH*2; /* push OSCR out of the way */
+ OSMR0 = LATCH; /* set initial match */
OSSR = 0xf; /* clear status on all timers */
setup_irq(IRQ_OST0, &sa1100_timer_irq);
- OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
- OSCR = 0; /* initialize free-running timer, force first match */
+ OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
+ OSCR = 0; /* initialize free-running timer */
}
#ifdef CONFIG_NO_IDLE_HZ