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authorJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>2011-12-01 21:13:01 +0100
committerTony Lindgren <tony@atomide.com>2011-12-01 17:51:34 -0800
commitc2cb211116192690605eaa70d39deb04241003e2 (patch)
tree4c98392b4459c5c86249e0b7f044885bcf5cce4f /arch
parentb29e23547ecb2a609777288cd81fc83b01f9f43f (diff)
ARM: OMAP1: Fix ckctl value used for dpll1 defualt rate
Use the exact value found in omap1_rate_table, otherwise I have been experiencing issues with correct timekeeping on my Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> [tony@atomide.com: removed comment referencing a development branch] Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap1/clock_data.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 3f305610efa0..86b2dec11788 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -937,7 +937,7 @@ void __init omap1_clk_late_init(void)
if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
pr_err("System frequencies not set, using default. Check your config.\n");
omap_writew(0x2290, DPLL_CTL);
- omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
+ omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL);
ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
}
propagate_rate(&ck_dpll1);