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authorPaul Mundt <lethal@linux-sh.org>2008-04-25 13:05:17 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-05-08 19:51:38 +0900
commit2a6b8148c050941dd61779cb0b49c5c3ea854ebf (patch)
tree7c39b24312a6137decdd32f6087b0c0e31b2f550 /arch/sh/kernel/cpu/sh5
parent640f7487a919dec4ea98b88a050331f6a4044ea9 (diff)
sh64: Setup I/D-TLB defaults in SH-5 probe path.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh5')
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 31f8cb0f6374..92ad844b5c12 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -15,6 +15,7 @@
#include <linux/string.h>
#include <asm/processor.h>
#include <asm/cache.h>
+#include <asm/tlb.h>
int __init detect_cpu_and_cache_system(void)
{
@@ -67,5 +68,8 @@ int __init detect_cpu_and_cache_system(void)
set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
#endif
+ /* Setup some I/D TLB defaults */
+ sh64_tlb_init();
+
return 0;
}