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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-13 19:23:01 -0800 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-13 19:23:01 -0800 |
commit | 93c222c0e126c1c24ac454acf013f2c85e57bd8b (patch) | |
tree | 920c429de92857aaf74e64a0f4f9fbaec7032fcf /arch/parisc/kernel/pci.c | |
parent | f89c2b39ce676cb08b6ed8848cde76dcb21cc672 (diff) | |
parent | 9f9499ae8e6415cefc4fe0a96ad0e27864353c89 (diff) |
Merge 4.4-rc5 into staging-next
We want those fixes in here for testing.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/parisc/kernel/pci.c')
-rw-r--r-- | arch/parisc/kernel/pci.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 64f2764a8cef..c99f3dde455c 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c @@ -171,24 +171,6 @@ void pcibios_set_master(struct pci_dev *dev) } -void __init pcibios_init_bus(struct pci_bus *bus) -{ - struct pci_dev *dev = bus->self; - unsigned short bridge_ctl; - - /* We deal only with pci controllers and pci-pci bridges. */ - if (!dev || (dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) - return; - - /* PCI-PCI bridge - set the cache line and default latency - (32) for primary and secondary buses. */ - pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 32); - - pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bridge_ctl); - bridge_ctl |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; - pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl); -} - /* * pcibios align resources() is called every time generic PCI code * wants to generate a new address. The process of looking for |