diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 12:59:30 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 10:00:22 +0100 |
commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/include/asm/txx9/rbtx4939.h | |
parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/txx9/rbtx4939.h')
-rw-r--r-- | arch/mips/include/asm/txx9/rbtx4939.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/include/asm/txx9/rbtx4939.h b/arch/mips/include/asm/txx9/rbtx4939.h index e517899794a8..6157bfd90848 100644 --- a/arch/mips/include/asm/txx9/rbtx4939.h +++ b/arch/mips/include/asm/txx9/rbtx4939.h @@ -17,7 +17,7 @@ /* Address map */ #define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) -#define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) +#define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) #define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002) #define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004) #define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006) @@ -46,9 +46,9 @@ #define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c) #define RBTX4939_7SEG_ADDR(s, ch) \ (IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2) -#define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000) +#define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000) #define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002) -#define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004) +#define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004) #define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000) /* Ethernet port address */ @@ -77,11 +77,11 @@ #define RBTX4939_PE2_CIR 0x08 #define RBTX4939_PE2_SPI 0x10 #define RBTX4939_PE2_GPIO 0x20 -#define RBTX4939_PE3_VP 0x01 +#define RBTX4939_PE3_VP 0x01 #define RBTX4939_PE3_VP_P 0x02 #define RBTX4939_PE3_VP_S 0x04 -#define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR) +#define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR) #define rbtx4939_ioc_rev_addr ((u8 __iomem *)RBTX4939_IOC_REV_ADDR) #define rbtx4939_config1_addr ((u8 __iomem *)RBTX4939_CONFIG1_ADDR) #define rbtx4939_config2_addr ((u8 __iomem *)RBTX4939_CONFIG2_ADDR) @@ -110,9 +110,9 @@ #define rbtx4939_vpsin_addr ((u8 __iomem *)RBTX4939_VPSIN_ADDR) #define rbtx4939_7seg_addr(s, ch) \ ((u8 __iomem *)RBTX4939_7SEG_ADDR(s, ch)) -#define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR) +#define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR) #define rbtx4939_reseten_addr ((u8 __iomem *)RBTX4939_RESETEN_ADDR) -#define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR) +#define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR) /* * IRQ mappings |