diff options
| author | David S. Miller <davem@davemloft.net> | 2010-05-18 23:01:55 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-05-18 23:01:55 -0700 |
| commit | 2ec8c6bb5d8f3a62a79f463525054bae1e3d4487 (patch) | |
| tree | fa7f8400ac685fb52e96f64997c7c682fc2aa021 /arch/mips/include/asm/mipsregs.h | |
| parent | 7b39f90fabcf9e2af0cd79d0a60440d821e22b56 (diff) | |
| parent | 537b60d17894b7c19a6060feae40299d7109d6e7 (diff) | |
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Conflicts:
include/linux/mod_devicetable.h
scripts/mod/file2alias.c
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 49382d5e891a..c6e3c93ce7c7 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -135,6 +135,12 @@ #define FPU_CSR_COND7 0x80000000 /* $fcc7 */ /* + * Bits 18 - 20 of the FPU Status Register will be read as 0, + * and should be written as zero. + */ +#define FPU_CSR_RSVD 0x001c0000 + +/* * X the exception cause indicator * E the exception enable * S the sticky/flag bit @@ -161,7 +167,8 @@ #define FPU_CSR_UDF_S 0x00000008 #define FPU_CSR_INE_S 0x00000004 -/* rounding mode */ +/* Bits 0 and 1 of FPU Status Register specify the rounding mode */ +#define FPU_CSR_RM 0x00000003 #define FPU_CSR_RN 0x0 /* nearest */ #define FPU_CSR_RZ 0x1 /* towards zero */ #define FPU_CSR_RU 0x2 /* towards +Infinity */ |