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authorSteve French <sfrench@us.ibm.com>2006-03-20 16:58:09 +0000
committerSteve French <sfrench@us.ibm.com>2006-03-20 16:58:09 +0000
commitfd4a0b92db6a57cba8d03efbe1cebf91f9124ce0 (patch)
tree5886a08bfa1132058b06074f4666a36dc5ddd2a1 /arch/ia64/kernel
parent88274815f7477dc7550439413ab87c5ce4c5a623 (diff)
parent7705a8792b0fc82fd7d4dd923724606bbfd9fb20 (diff)
Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Signed-off-by: Steve French <sfrench@us.ibm.com>
Diffstat (limited to 'arch/ia64/kernel')
-rw-r--r--arch/ia64/kernel/cyclone.c2
-rw-r--r--arch/ia64/kernel/ivt.S15
-rw-r--r--arch/ia64/kernel/mca_drv.c16
3 files changed, 21 insertions, 12 deletions
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index 6ade3790ce07..e00b21514f7c 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -36,7 +36,7 @@ int __init init_cyclone_clock(void)
u32* volatile cyclone_timer; /* Cyclone MPMC0 register */
if (!use_cyclone)
- return -ENODEV;
+ return 0;
printk(KERN_INFO "Summit chipset: Starting Cyclone Counter.\n");
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
index 9f80569a32b0..dcd906fe5749 100644
--- a/arch/ia64/kernel/ivt.S
+++ b/arch/ia64/kernel/ivt.S
@@ -561,11 +561,12 @@ ENTRY(dirty_bit)
;; // avoid RAW on r18
mov ar.ccv=r18 // set compare value for cmpxchg
or r25=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits
+ tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
;;
- cmpxchg8.acq r26=[r17],r25,ar.ccv
+(p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only update if page is present
mov r24=PAGE_SHIFT<<2
;;
- cmp.eq p6,p7=r26,r18
+(p6) cmp.eq p6,p7=r26,r18 // Only compare if page is present
;;
(p6) itc.d r25 // install updated PTE
;;
@@ -626,11 +627,12 @@ ENTRY(iaccess_bit)
;;
mov ar.ccv=r18 // set compare value for cmpxchg
or r25=_PAGE_A,r18 // set the accessed bit
+ tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
;;
- cmpxchg8.acq r26=[r17],r25,ar.ccv
+(p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only if page present
mov r24=PAGE_SHIFT<<2
;;
- cmp.eq p6,p7=r26,r18
+(p6) cmp.eq p6,p7=r26,r18 // Only if page present
;;
(p6) itc.i r25 // install updated PTE
;;
@@ -680,11 +682,12 @@ ENTRY(daccess_bit)
;; // avoid RAW on r18
mov ar.ccv=r18 // set compare value for cmpxchg
or r25=_PAGE_A,r18 // set the dirty bit
+ tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
;;
- cmpxchg8.acq r26=[r17],r25,ar.ccv
+(p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only if page is present
mov r24=PAGE_SHIFT<<2
;;
- cmp.eq p6,p7=r26,r18
+(p6) cmp.eq p6,p7=r26,r18 // Only if page is present
;;
(p6) itc.d r25 // install updated PTE
/*
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
index 8fd93afa75a7..e883d85906db 100644
--- a/arch/ia64/kernel/mca_drv.c
+++ b/arch/ia64/kernel/mca_drv.c
@@ -123,8 +123,9 @@ mca_page_isolate(unsigned long paddr)
void
mca_handler_bh(unsigned long paddr)
{
- printk(KERN_DEBUG "OS_MCA: process [pid: %d](%s) encounters MCA.\n",
- current->pid, current->comm);
+ printk(KERN_ERR
+ "OS_MCA: process [pid: %d](%s) encounters MCA (paddr=%lx)\n",
+ current->pid, current->comm, paddr);
spin_lock(&mca_bh_lock);
switch (mca_page_isolate(paddr)) {
@@ -132,7 +133,7 @@ mca_handler_bh(unsigned long paddr)
printk(KERN_DEBUG "Page isolation: ( %lx ) success.\n", paddr);
break;
case ISOLATE_NG:
- printk(KERN_DEBUG "Page isolation: ( %lx ) failure.\n", paddr);
+ printk(KERN_CRIT "Page isolation: ( %lx ) failure.\n", paddr);
break;
default:
break;
@@ -567,10 +568,15 @@ recover_from_processor_error(int platform, slidx_table_t *slidx,
return 0;
/*
- * If there is no bus error, record is weird but we need not to recover.
+ * The cache check and bus check bits have four possible states
+ * cc bc
+ * 0 0 Weird record, not recovered
+ * 1 0 Cache error, not recovered
+ * 0 1 I/O error, attempt recovery
+ * 1 1 Memory error, attempt recovery
*/
if (psp->bc == 0 || pbci == NULL)
- return 1;
+ return 0;
/*
* Sorry, we cannot handle so many.