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author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-03-15 17:11:04 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-05-11 23:00:21 +0900 |
commit | 3e7be9b6326488735319d10392dd2d3f22981238 (patch) | |
tree | bdb507d65b6fdcb872c7168508c2afe565fcf2db /arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts | |
parent | a9e9a4a627257517ae9b74b9abb412edd5930c3b (diff) |
arm64: dts: qcom: sdm845: correct dynamic power coefficients
[ Upstream commit 0e0a8e35d72533b3eef3365e900baacd7cede8e2 ]
Following sm8150/sm8250 update sdm845 capacity-dmips-mhz and
dynamic-power-coefficient based on the measurements [1], [2].
The energy model dynamic-power-coefficient values were calculated with
DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.
Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.
For more details on measurement process see the commit message for the
commit 6aabed5526ee ("arm64: dts: qcom: sm8250: Add CPU capacities and
energy model").
[1] https://github.com/kdrag0n/freqbench
[2] https://github.com/kdrag0n/freqbench/tree/master/results/sdm845/main
Cc: Danny Lin <danny@kdrag0n.dev>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220315141104.730235-1-dmitry.baryshkov@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts')
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