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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 13:25:22 +0100
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 14:47:57 +0200
commit6845664a6a7d443f03883db59d10749d38d98b8e (patch)
tree4b4499f4d41f24152190220d93ea186fbf991fca /arch/arm/plat-s5p/irq-gpioint.c
parent25a5662a13e604d86b0a9fd71703582a7393d8ec (diff)
arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/plat-s5p/irq-gpioint.c')
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index cd87d3256e03..46dd078147d8 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -43,13 +43,13 @@ LIST_HEAD(banks);
static int s5p_gpioint_get_offset(struct irq_data *data)
{
- struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+ struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
return data->irq - chip->irq_base;
}
static void s5p_gpioint_ack(struct irq_data *data)
{
- struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+ struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
int group, offset, pend_offset;
unsigned int value;
@@ -64,7 +64,7 @@ static void s5p_gpioint_ack(struct irq_data *data)
static void s5p_gpioint_mask(struct irq_data *data)
{
- struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+ struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
int group, offset, mask_offset;
unsigned int value;
@@ -79,7 +79,7 @@ static void s5p_gpioint_mask(struct irq_data *data)
static void s5p_gpioint_unmask(struct irq_data *data)
{
- struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+ struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
int group, offset, mask_offset;
unsigned int value;
@@ -100,7 +100,7 @@ static void s5p_gpioint_mask_ack(struct irq_data *data)
static int s5p_gpioint_set_type(struct irq_data *data, unsigned int type)
{
- struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+ struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
int group, offset, con_offset;
unsigned int value;
@@ -149,7 +149,7 @@ static struct irq_chip s5p_gpioint = {
static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
{
- struct s5p_gpioint_bank *bank = get_irq_data(irq);
+ struct s5p_gpioint_bank *bank = irq_get_handler_data(irq);
int group, pend_offset, mask_offset;
unsigned int pend, mask;
@@ -200,8 +200,8 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
if (!bank->chips)
return -ENOMEM;
- set_irq_chained_handler(bank->irq, s5p_gpioint_handler);
- set_irq_data(bank->irq, bank);
+ irq_set_chained_handler(bank->irq, s5p_gpioint_handler);
+ irq_set_handler_data(bank->irq, bank);
bank->handler = s5p_gpioint_handler;
printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n",
bank->irq);
@@ -219,9 +219,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
bank->chips[group - bank->start] = chip;
for (i = 0; i < chip->chip.ngpio; i++) {
irq = chip->irq_base + i;
- set_irq_chip(irq, &s5p_gpioint);
- set_irq_data(irq, chip);
- set_irq_handler(irq, handle_level_irq);
+ irq_set_chip(irq, &s5p_gpioint);
+ irq_set_handler_data(irq, chip);
+ irq_set_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
return 0;