diff options
| author | Will Deacon <will.deacon@arm.com> | 2012-04-18 10:50:15 +0100 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2012-06-21 12:26:06 +0530 |
| commit | e9dbb2b6606a9a23786c829eb1ce0f8c14437819 (patch) | |
| tree | ae321046c4deeecf75621752a36e1f99d940ddec /arch/arm/mm/proc-arm946.S | |
| parent | 9c3dc523f680122314951ce66039c34ebc31baae (diff) | |
ARM: cacheflush: return error to userspace when flushing syscall fails
The cacheflush syscall can fail for two reasons:
(1) The arguments are invalid (nonsensical address range or no VMA)
(2) The region generates a translation fault on a VIPT or PIPT cache
This patch allows do_cache_op to return an error code to userspace in
the case of the above. The various coherent_user_range implementations
are modified to return 0 in the case of VIVT caches or -EFAULT in the
case of an abort on v6/v7 cores.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/mm/proc-arm946.S')
| -rw-r--r-- | arch/arm/mm/proc-arm946.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index f684cfedcca9..9f4f2999fdd0 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -190,6 +190,7 @@ ENTRY(arm946_coherent_user_range) cmp r0, r1 blo 1b mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov r0, #0 mov pc, lr /* |