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authorJosh Cartwright <josh.cartwright@ni.com>2012-10-23 17:34:22 -0500
committerMichal Simek <michal.simek@xilinx.com>2012-10-29 08:31:22 +0100
commit0fcfdbcacf6fa234064126e5b18c720ca27bc6e7 (patch)
treec7e4e0f00c90c814781189e36abf2dda32c61ddc /arch/arm/mach-zynq/include/mach
parentf447ed2dbc844d645ef8bf82cc04281fa4163aed (diff)
zynq: use pl310 device tree bindings
The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using the device tree. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq/include/mach')
-rw-r--r--arch/arm/mach-zynq/include/mach/zynq_soc.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index 3d1c6a6a8feb..218283a94247 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -25,9 +25,6 @@
#define TTC0_PHYS 0xF8001000
#define TTC0_VIRT TTC0_PHYS
-#define PL310_L2CC_PHYS 0xF8F02000
-#define PL310_L2CC_VIRT PL310_L2CC_PHYS
-
#define SCU_PERIPH_PHYS 0xF8F00000
#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
@@ -35,7 +32,6 @@
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
-#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
/*
* Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical