diff options
| author | Laxman Dewangan <ldewangan@nvidia.com> | 2011-04-25 12:14:31 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2012-03-22 23:25:24 -0700 |
| commit | d07300ff2823970d33b1a8b5b6c1a4e5008fee08 (patch) | |
| tree | 180c79971c32f8691573ec11258dc7c7b0871ebb /arch/arm/mach-tegra/pinmux-tegra30-tables.c | |
| parent | b501ebacf43ce6668e5b01d1241b75b3a3f4e2c1 (diff) | |
arm: tegra3: Updating pinmux table based on TRM
On tegra3 TRM, some of the pin mux option for a given
pin group is not recommended and so not exposed in the
TRM reference table.
Updating the pinmux table accordingly. The non-recommended
pin option is set as TEGRA_MUX_INVALID.
bug 817099
Original-Change-Id: I572ee84912fe065a73e59d4f9ba0ce01223ead85
Reviewed-on: http://git-master/r/29626
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R88ad8a84c4516c8692b9266d6c073f20e35b420e
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-tegra30-tables.c')
| -rw-r--r-- | arch/arm/mach-tegra/pinmux-tegra30-tables.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/pinmux-tegra30-tables.c b/arch/arm/mach-tegra/pinmux-tegra30-tables.c index 08eefd75b371..a02dd113ed9d 100644 --- a/arch/arm/mach-tegra/pinmux-tegra30-tables.c +++ b/arch/arm/mach-tegra/pinmux-tegra30-tables.c @@ -231,7 +231,7 @@ static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] PINGROUP(GMI_WAIT, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31c8), PINGROUP(GMI_ADV_N, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31cc), PINGROUP(GMI_CLK, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31d0), - PINGROUP(GMI_CS0_N, GMI, RSVD1, NAND, GMI, DTV, RSVD, INPUT, 0x31d4), + PINGROUP(GMI_CS0_N, GMI, RSVD1, NAND, GMI, INVALID, RSVD, INPUT, 0x31d4), PINGROUP(GMI_CS1_N, GMI, RSVD1, NAND, GMI, DTV, RSVD, INPUT, 0x31d8), PINGROUP(GMI_CS2_N, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31dc), PINGROUP(GMI_CS3_N, GMI, RSVD1, NAND, GMI, GMI_ALT, RSVD, INPUT, 0x31e0), @@ -255,8 +255,8 @@ static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] PINGROUP(GMI_AD14, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3228), PINGROUP(GMI_AD15, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x322c), PINGROUP(GMI_A16, GMI, UARTD, SPI4, GMI, GMI_ALT, RSVD, INPUT, 0x3230), - PINGROUP(GMI_A17, GMI, UARTD, SPI4, GMI, DTV, RSVD, INPUT, 0x3234), - PINGROUP(GMI_A18, GMI, UARTD, SPI4, GMI, DTV, RSVD, INPUT, 0x3238), + PINGROUP(GMI_A17, GMI, UARTD, SPI4, GMI, INVALID, RSVD, INPUT, 0x3234), + PINGROUP(GMI_A18, GMI, UARTD, SPI4, GMI, INVALID, RSVD, INPUT, 0x3238), PINGROUP(GMI_A19, GMI, UARTD, SPI4, GMI, RSVD3, RSVD, INPUT, 0x323c), PINGROUP(GMI_WR_N, GMI, RSVD1, NAND, GMI, RSVD3, RSVD, INPUT, 0x3240), PINGROUP(GMI_OE_N, GMI, RSVD1, NAND, GMI, RSVD3, RSVD, INPUT, 0x3244), |