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| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-22 13:21:08 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2012-03-22 23:26:57 -0700 |
| commit | f70bce866c319802047acca22587644ca437175b (patch) | |
| tree | be4e8f6f7e8aad1cd4233efe2986bf00b8b7c4dd /arch/arm/mach-tegra/cpuidle.h | |
| parent | 0f58071a4bc1e21eebdc9cb321fa75d635d71557 (diff) | |
ARM: tegra: Add LP2 exit latency correction
Change-Id: I37cb57f8674d8ddea3861fdc59543c3dfa8498db
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R0a1d0c79e22f9191bde70b8b05541c5bfe26f4df
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.h')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index 35c3360a6e17..ae3386139d38 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -23,6 +23,8 @@ #ifdef CONFIG_PM_SLEEP +extern int tegra_lp2_exit_latency; + #ifdef CONFIG_ARCH_TEGRA_2x_SOC void tegra2_idle_lp2(struct cpuidle_device *dev, struct cpuidle_state *state); void tegra2_cpu_idle_stats_lp2_ready(unsigned int cpu); |