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authorBo Yan <byan@nvidia.com>2013-02-05 09:57:10 -0800
committerMandar Padmawar <mpadmawar@nvidia.com>2013-02-06 05:43:09 -0800
commit371dbb18fcb21c3133b33cd839c8a875ca0d9a60 (patch)
treea5de65f1bd1ba0b0101936409250c0c06ccd28be /arch/arm/mach-tegra/board-dalmore-power.c
parentaa96d4bcf679d80963ba11c3a73d5918bfc95943 (diff)
ARM: tegra11x: Define ncpu residency for 2 clusters
There is no compelling reason to define minimum residency of non CPU power gating for each different platform. Non CPU power gating has far less dependency on platform in terms of latency when compared against rail gating. So move this parameter to CPU specific idle driver code. Define minimum residency of non CPU power gating for both slow and fast cluster. The entry criteria is different for two clusters, so different value are required. Change-Id: I3f734d056f6de6a804ca4c14e037a98bc07c646d Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/197537 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-dalmore-power.c')
-rw-r--r--arch/arm/mach-tegra/board-dalmore-power.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-dalmore-power.c b/arch/arm/mach-tegra/board-dalmore-power.c
index a7dcc200b956..d47bb5dab4da 100644
--- a/arch/arm/mach-tegra/board-dalmore-power.c
+++ b/arch/arm/mach-tegra/board-dalmore-power.c
@@ -994,8 +994,7 @@ static struct tegra_suspend_platform_data dalmore_suspend_data = {
.corereq_high = true,
.sysclkreq_high = true,
.cpu_lp2_min_residency = 1000,
- .min_residency_noncpu = 2000,
- .min_residency_crail = 8000,
+ .min_residency_crail = 20000,
};
#ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
/* board parameters for cpu dfll */