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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-18 12:37:20 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-02-04 14:32:24 +0000
commit76346a4eabf85a44dc425c0197ba46a8884e6090 (patch)
treeadc6224fe2626cdee005cd7b6589539d2150b2c8 /arch/arm/mach-sa1100/include
parent7cf779cb8ddeef797a3a265889c7f088d42a12f7 (diff)
PCMCIA: sa11x0: nanoengine: convert reset handling to use GPIO subsystem
Rather than accessing GPSR and GPCR directly, use the GPIO subsystem instead. Acked-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/include')
-rw-r--r--arch/arm/mach-sa1100/include/mach/nanoengine.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
index ad24c6c37402..5ebd469a31f2 100644
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h
@@ -20,8 +20,8 @@
#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */
#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */
#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */
-#define GPIO_PC_RESET0 GPIO_GPIO(15) /* reset socket 0 */
-#define GPIO_PC_RESET1 GPIO_GPIO(16) /* reset socket 1 */
+#define GPIO_PC_RESET0 15 /* reset socket 0 */
+#define GPIO_PC_RESET1 16 /* reset socket 1 */
#define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0
#define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11