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authorThomas Abraham <thomas.ab@samsung.com>2010-05-17 09:38:28 +0900
committerBen Dooks <ben-linux@fluff.org>2010-05-17 10:37:34 +0900
commitc62ec6a9aaabd5d0512e9d091d82940efefa4fa6 (patch)
tree02ad6a800d8125135b1ca31dec507cf7ff32c15b /arch/arm/mach-s5pv210
parenteb1ef1ed06a168cf548419ba6e99f34c8169cffe (diff)
ARM: S5PV210: Rearrange assignment of clock for fout apll/mpll/epll clocks
The assignment of clock rates for fout apll/mpll/epll is moved further up in the s5pv210_setup_clocks function because the subsequent patches require the clock rate of fout clocks to be setup. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r--arch/arm/mach-s5pv210/clock.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 25b73a38d6d5..d782fed0c76e 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -369,6 +369,10 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
+ clk_fout_apll.rate = apll;
+ clk_fout_mpll.rate = mpll;
+ clk_fout_epll.rate = epll;
+
printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld",
apll, mpll, epll);
@@ -398,10 +402,6 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66);
- clk_fout_apll.rate = apll;
- clk_fout_mpll.rate = mpll;
- clk_fout_epll.rate = epll;
-
clk_f.rate = armclk;
clk_h.rate = hclk133;
clk_p.rate = pclk66;