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authorKevin Hilman <khilman@ti.com>2011-07-20 16:35:46 -0700
committerKevin Hilman <khilman@ti.com>2011-09-15 12:09:22 -0700
commit5876c940c0dee298e38fbf47ce67c9e220b0572c (patch)
treef4f9773abbc985e427b6c9892402064a473e9ba6 /arch/arm/mach-omap2/vc3xxx_data.c
parent6a62b78d9aa6661cae1a7d30b574daf435a14c47 (diff)
OMAP2+: VC: more registers are per-channel starting with OMAP5
Starting with OMAP5, the following registers are per-channel and not common to a all VC channels: - SMPS I2C slave address - SMPS voltage register address offset - SMPS cmd/value register address offset - VC channel configuration register Move these from the channel-common struct into the per-channel struct to support OMAP5. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/vc3xxx_data.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 95d7701300cb..cfe348e1af0e 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -30,9 +30,6 @@
* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
*/
static struct omap_vc_common omap3_vc_common = {
- .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
- .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
- .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
.data_shift = OMAP3430_DATA_SHIFT,
.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
@@ -43,7 +40,6 @@ static struct omap_vc_common omap3_vc_common = {
.cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT,
.cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
.cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
- .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
.i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
.i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
.i2c_mcode_mask = OMAP3430_MCODE_MASK,
@@ -51,6 +47,10 @@ static struct omap_vc_common omap3_vc_common = {
struct omap_vc_channel omap3_vc_mpu = {
.common = &omap3_vc_common,
+ .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
+ .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
+ .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
+ .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
.smps_volra_mask = OMAP3430_VOLRA0_MASK,
@@ -60,6 +60,10 @@ struct omap_vc_channel omap3_vc_mpu = {
struct omap_vc_channel omap3_vc_core = {
.common = &omap3_vc_common,
+ .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
+ .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
+ .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
+ .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
.smps_volra_mask = OMAP3430_VOLRA1_MASK,