diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-29 03:27:42 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-30 21:13:13 +0900 |
| commit | 3bdba5ac181a2e9eb76bb7673bb11ab5b9783f63 (patch) | |
| tree | c9b6a0e7f1be7670c7dc5694bbfbaf2a7e8ac12c /arch/arm/boot/dts/uniphier-sld3.dtsi | |
| parent | 77896e4d05af6a9330c5410a4d45cc72fd030f1c (diff) | |
ARM: dts: uniphier: switch over to PSCI
Use PSCI for enable-method instead of SoC specific implementation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-sld3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-sld3.dtsi | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-sld3.dtsi b/arch/arm/boot/dts/uniphier-sld3.dtsi index f33caf4ef12d..55f9afa2ee1b 100644 --- a/arch/arm/boot/dts/uniphier-sld3.dtsi +++ b/arch/arm/boot/dts/uniphier-sld3.dtsi @@ -51,12 +51,12 @@ cpus { #address-cells = <1>; #size-cells = <0>; - enable-method = "socionext,uniphier-smp"; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; + enable-method = "psci"; next-level-cache = <&l2>; }; @@ -64,10 +64,16 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; + enable-method = "psci"; next-level-cache = <&l2>; }; }; + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + clocks { refclk: ref { #clock-cells = <0>; |