diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2021-11-01 19:36:30 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-12-22 09:32:39 +0100 |
| commit | f580a4315062870dd1ad9676f3bada01db0536af (patch) | |
| tree | 1fd36e97f645e28cf7584cca0c4257dea2473585 /arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | |
| parent | e7506c76b7ef072df9d42df77fe73deb4b85ec26 (diff) | |
ARM: socfpga: dts: fix qspi node compatible
[ Upstream commit cb25b11943cbcc5a34531129952870420f8be858 ]
The QSPI flash node needs to have the required "jedec,spi-nor" in the
compatible string.
Fixes: 1df99da8953 ("ARM: dts: socfpga: Enable QSPI in Arria10 devkit")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5_sodia.dts')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts index 99a71757cdf4..3f7aa7bf0863 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts @@ -116,7 +116,7 @@ flash0: n25q512a@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q512a"; + compatible = "micron,n25q512a", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; |