diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-05-16 08:38:17 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-05-16 08:38:17 -0700 |
commit | e8a1d70117116c8d96c266f0b99e931717670eaf (patch) | |
tree | 384082054720dc01ad44f0342faeb80297f7fd8c /arch/arm/boot/dts/rk3288-tinker.dtsi | |
parent | 22c58fd70ca48a29505922b1563826593b08cc00 (diff) | |
parent | 6cbc4d88ad208d6f5b9567bac2fff038e1bbfa77 (diff) |
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM Device-tree updates from Olof Johansson:
"Besides new bindings and additional descriptions of hardware blocks
for various SoCs and boards, the main new contents here is:
SoCs:
- Intel Agilex (SoCFPGA)
- NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus)
New boards:
- Allwinner:
+ RerVision H3-DVK (H3)
+ Oceanic 5205 5inMFD (H6)
+ Beelink GS2 (H6)
+ Orange Pi 3 (H6)
- Rockchip:
+ Orange Pi RK3399
+ Nanopi NEO4
+ Veyron-Mighty Chromebook variant
- Amlogic:
+ SEI Robotics SEI510
- ST Micro:
+ stm32mp157a discovery1
+ stm32mp157c discovery2
- NXP:
+ Eckelmann ci4x10 (i.MX6DL)
+ i.MX8MM EVK (i.MX8MM)
+ ZII i.MX7 RPU2 (i.MX7)
+ ZII SPB4 (VF610)
+ Zii Ultra (i.MX8M)
+ TQ TQMa7S (i.MX7Solo)
+ TQ TQMa7D (i.MX7Dual)
+ Kobo Aura (i.MX50)
+ Menlosystems M53 (i.MX53)j
- Nvidia:
+ Jetson Nano (Tegra T210)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (593 commits)
arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
arm64: dts: bitmain: Add GPIO support for BM1880 SoC
ARM: dts: gemini: Indent DIR-685 partition table
dt-bindings: hwmon (pwm-fan) Remove dead "cooling-*-state" properties
ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY
arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20
arm64: dts: msm8998: thermal: Fix number of supported sensors
arm64: dts: msm8998-mtp: thermal: Remove skin and battery thermal zones
arm64: dts: exynos: Move fixed-clocks out of soc
arm64: dts: exynos: Move pmu and timer nodes out of soc
ARM: dts: s5pv210: Fix camera clock provider on Goni board
ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210
ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250
ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250
ARM: dts: exynos: Move pmu and timer nodes out of soc
arm64: dts: rockchip: fix IO domain voltage setting of APIO5 on rockpro64
arm64: dts: db820c: Add sound card support
arm64: dts: apq8096-db820c: Add HDMI display support
...
Diffstat (limited to 'arch/arm/boot/dts/rk3288-tinker.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3288-tinker.dtsi | 67 |
1 files changed, 52 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi index ef653c3209bc..293576869546 100644 --- a/arch/arm/boot/dts/rk3288-tinker.dtsi +++ b/arch/arm/boot/dts/rk3288-tinker.dtsi @@ -5,6 +5,7 @@ #include "rk3288.dtsi" #include <dt-bindings/input/input.h> +#include <dt-bindings/clock/rockchip,rk808.h> / { chosen { @@ -61,6 +62,16 @@ }; }; + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 RK808_CLKOUT1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable>; + reset-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>, + <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -338,6 +349,7 @@ status = "okay"; sdcard-supply = <&vccio_sd>; + wifi-supply = <&vcc_18>; }; &pinctrl { @@ -352,68 +364,75 @@ backlight { bl_en: bl-en { - rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; buttons { pwrbtn: pwrbtn { - rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; eth_phy { eth_phy_pwr: eth-phy-pwr { - rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; pmic { pmic_int: pmic-int { - rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \ + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO \ &pcfg_pull_up>; }; dvs_1: dvs-1 { - rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \ + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO \ &pcfg_pull_down>; }; dvs_2: dvs-2 { - rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \ + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO \ &pcfg_pull_down>; }; }; sdmmc { sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, - <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, - <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, - <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>, + <6 RK_PC1 1 &pcfg_pull_up_drv_8ma>, + <6 RK_PC2 1 &pcfg_pull_up_drv_8ma>, + <6 RK_PC3 1 &pcfg_pull_up_drv_8ma>; }; sdmmc_clk: sdmmc-clk { - rockchip,pins = <6 20 RK_FUNC_1 \ + rockchip,pins = <6 RK_PC4 1 \ &pcfg_pull_none_drv_8ma>; }; sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>; }; sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; usb { host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; }; pwr_3g: pwr-3g { - rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <7 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio { + wifi_enable: wifi-enable { + rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; @@ -440,6 +459,24 @@ vqmmc-supply = <&vccio_sd>; }; +&sdio0 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + max-frequency = <50000000>; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc_18>; + status = "okay"; +}; + &tsadc { rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ |