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| author | Max Krummenacher <max.krummenacher@toradex.com> | 2014-09-15 15:57:05 +0200 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2014-09-15 15:58:32 +0200 |
| commit | 388a296ac9f78fba8392c2191264f77c3fdb0ec3 (patch) | |
| tree | 8d021e927994c8e6bbaef0030651da92eca9ebc4 /arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | |
| parent | 8a4f50a4658f8406ede0f21e643e21deff6b6c3e (diff) | |
Colibri iMX6 dtb: enable weim interface
Enable the external memory bus, aka weim.
Define a sram at CS0 and one at CS1, each in non multiplexed mode.
Diffstat (limited to 'arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts index 03c03cd91d75..a8544d8937ba 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -217,3 +217,30 @@ status = "okay"; }; +&weim { + status = "okay"; + /* weim memory map: 32MB on CS0, 32MB on CS1, 32MB on CS2 */ + ranges = <0 0 0x08000000 0x02000000 + 1 0 0x0a000000 0x02000000 + 2 0 0x0c000000 0x02000000>; + /* SRAM on CS0 */ + sram@0,0 { + compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; + reg = <0 0 0x00010000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000 + 0x00000000 0x04000040 0x00000000>; + }; + /* SRAM on CS1 */ + sram@1,0 { + compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; + reg = <1 0 0x00010000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000 + 0x00000000 0x04000040 0x00000000>; + }; +}; |