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authorOlof Johansson <olof@lixom.net>2013-04-28 12:43:08 -0700
committerOlof Johansson <olof@lixom.net>2013-04-28 15:01:12 -0700
commitafcf7924ecab726dab0227188783c4a40d9f0eec (patch)
tree606b0883c0ad3fb2ef04f0f036a55ed3875fdc9b /arch/arm/Kconfig
parentdc9c220304c882f06aaadf427821c6388782aab8 (diff)
parentd21be237ffa357e55005e2bf9ffef10b23c184d0 (diff)
Merge branch 'fixes' into next/cleanup
Merging in fixes since there's a conflict in the omap4 clock tables caused by it. * fixes: (245 commits) ARM: highbank: fix cache flush ordering for cpu hotplug ARM: OMAP4: hwmod data: make 'ocp2scp_usb_phy_phy_48m" as the main clock arm: mvebu: Fix the irq map function in SMP mode Fix GE0/GE1 init on ix2-200 as GE0 has no PHY ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller ARM: S3C24XX: Correct NR_IRQS definition for s3c2440 ARM i.MX6: Fix ldb_di clock selection ARM: imx: provide twd clock lookup from device tree ARM: imx35 Bugfix admux clock ARM: clk-imx35: Bugfix iomux clock + Linux 3.9-rc6 Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-omap2/cclock44xx_data.c
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f0a579e8c16c..32e215fd91ec 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1175,9 +1175,9 @@ config ARM_NR_BANKS
default 8
config IWMMXT
- bool "Enable iWMMXt support"
+ bool "Enable iWMMXt support" if !CPU_PJ4
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
- default y if PXA27x || PXA3xx || ARCH_MMP
+ default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
help
Enable support for iWMMXt context switching at run time if
running on a CPU that supports it.
@@ -1431,6 +1431,16 @@ config ARM_ERRATA_775420
to deadlock. This workaround puts DSB before executing ISB if
an abort may occur on cache maintenance.
+config ARM_ERRATA_798181
+ bool "ARM errata: TLBI/DSB failure on Cortex-A15"
+ depends on CPU_V7 && SMP
+ help
+ On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
+ adequately shooting down all use of the old entries. This
+ option enables the Linux kernel workaround for this erratum
+ which sends an IPI to the CPUs that are running the same ASID
+ as the one being invalidated.
+
endmenu
source "arch/arm/common/Kconfig"