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authorTom St Denis <tom.stdenis@amd.com>2016-10-13 12:38:07 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-10-21 11:11:32 -0400
commitfb9a5b0c1c9893db2e0d18544fd49e19d784a87d (patch)
treebe5ba92c8df0c3de6b5348af89460a1c44facffa
parent77f7f71f5be1087823296f2dd8114ff7246ae877 (diff)
drm/radeon/si_dpm: Limit clocks on HD86xx part
Limit clocks on a specific HD86xx part to avoid crashes (while awaiting an appropriate PP fix). Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
-rw-r--r--drivers/gpu/drm/radeon/si_dpm.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 89bdf20344ae..e22b11189628 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -3021,6 +3021,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
max_sclk = 75000;
max_mclk = 80000;
}
+ /* limit clocks on HD8600 series */
+ if (rdev->pdev->device == 0x6660 &&
+ rdev->pdev->revision == 0x83) {
+ max_sclk = 75000;
+ max_mclk = 80000;
+ }
if (rps->vce_active) {
rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;