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authorEric Anholt <eric@anholt.net>2018-04-30 11:10:57 -0700
committerEric Anholt <eric@anholt.net>2018-05-03 15:20:09 -0700
commit4000626f204d00f601dca7e9d9b8a793b07da4ad (patch)
tree1cd8c30f69c5ed02c8957834accf93d751d6bc68
parent4c70ac7639f6af6d7c2d01f0307665a4b9afada7 (diff)
dt-bindings: Add a new binding for Broadcom V3D 3.x and newer GPUs.
These OpenGL ES GPUs are present in the 7268 and 7278 set top box chips. v2: no changes v3: move to gpu/, fix typo Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180430181058.30181-2-eric@anholt.net Reviewed-by: Rob Herring <robh@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt28
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
new file mode 100644
index 000000000000..c907aa8dd755
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+++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
@@ -0,0 +1,28 @@
+Broadcom V3D GPU
+
+Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
+For V3D 2.x, see brcm,bcm-vc4.txt.
+
+Required properties:
+- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
+- reg: Physical base addresses and lengths of the register areas
+- reg-names: Names for the register areas. The "hub", "bridge", and "core0"
+ register areas are always required. The "gca" register area
+ is required if the GCA cache controller is present.
+- interrupts: The interrupt numbers. The first interrupt is for the hub,
+ while the following interrupts are for the cores.
+ See bindings/interrupt-controller/interrupts.txt
+
+Optional properties:
+- clocks: The core clock the unit runs on
+
+v3d {
+ compatible = "brcm,7268-v3d";
+ reg = <0xf1204000 0x100>,
+ <0xf1200000 0x4000>,
+ <0xf1208000 0x4000>,
+ <0xf1204100 0x100>;
+ reg-names = "bridge", "hub", "core0", "gca";
+ interrupts = <0 78 4>,
+ <0 77 4>;
+};