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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-01 21:03:21 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-01 21:03:21 +0100
commitee93916efe22f767628f9d25abb8ad8548797336 (patch)
treea9f96ac741d683738518a3deac59f73b331e81ca
parent07f841b7c587a3cbf481509be09ba5eda05f8d31 (diff)
[ARM] mm: switch SA1100 to use sparsemem
Tested on Assabet, and Assabet with Neponset's SDRAM at 3328M phys. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-sa1100/include/mach/memory.h16
2 files changed, 7 insertions, 11 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 83106c98755c..b21c93a5f926 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -479,9 +479,7 @@ config ARCH_RPC
config ARCH_SA1100
bool "SA1100-based"
select ISA
- select ARCH_DISCONTIGMEM_ENABLE
select ARCH_SPARSEMEM_ENABLE
- select ARCH_SELECT_MEMORY_MODEL
select ARCH_MTD_XIP
select GENERIC_GPIO
select GENERIC_TIME
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h
index 29f639e2afc6..1c127b68581d 100644
--- a/arch/arm/mach-sa1100/include/mach/memory.h
+++ b/arch/arm/mach-sa1100/include/mach/memory.h
@@ -40,23 +40,21 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
#define __bus_to_virt(x) __phys_to_virt(x)
/*
- * Because of the wide memory address space between physical RAM banks on the
- * SA1100, it's much convenient to use Linux's NUMA support to implement our
- * memory map representation. Assuming all memory nodes have equal access
+ * Because of the wide memory address space between physical RAM banks on the
+ * SA1100, it's much convenient to use Linux's SparseMEM support to implement
+ * our memory map representation. Assuming all memory nodes have equal access
* characteristics, we then have generic discontiguous memory support.
*
- * Of course, all this isn't mandatory for SA1100 implementations with only
- * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
- *
- * The nodes are matched with the physical memory bank addresses which are
- * incidentally the same as virtual addresses.
+ * The sparsemem banks are matched with the physical memory bank addresses
+ * which are incidentally the same as virtual addresses.
*
* node 0: 0xc0000000 - 0xc7ffffff
* node 1: 0xc8000000 - 0xcfffffff
* node 2: 0xd0000000 - 0xd7ffffff
* node 3: 0xd8000000 - 0xdfffffff
*/
-#define NODE_MEM_SIZE_BITS 27
+#define MAX_PHYSMEM_BITS 32
+#define SECTION_SIZE_BITS 27
/*
* Cache flushing area - SA1100 zero bank