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authorHarvey Hunt <harvey.hunt@imgtec.com>2016-02-24 15:16:43 +0000
committerTejun Heo <tj@kernel.org>2016-02-25 16:37:06 -0500
commit4ee34ea3a12396f35b26d90a094c75db95080baa (patch)
treea24b7f60c298fab7cab5929b8f15de3e7ca911d7
parentf5bdd66c705484b4bc77eb914be15c1b7881fae7 (diff)
libata: Align ata_device's id on a cacheline
The id buffer in ata_device is a DMA target, but it isn't explicitly cacheline aligned. Due to this, adjacent fields can be overwritten with stale data from memory on non coherent architectures. As a result, the kernel is sometimes unable to communicate with an ATA device. Fix this by ensuring that the id buffer is cacheline aligned. This issue is similar to that fixed by Commit 84bda12af31f ("libata: align ap->sector_buf"). Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: <stable@vger.kernel.org> # 2.6.18 Signed-off-by: Tejun Heo <tj@kernel.org>
-rw-r--r--include/linux/libata.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/libata.h b/include/linux/libata.h
index bec2abbd7ab2..2c4ebef79d0c 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -720,7 +720,7 @@ struct ata_device {
union {
u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
- };
+ } ____cacheline_aligned;
/* DEVSLP Timing Variables from Identify Device Data Log */
u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];