diff options
| author | Anshul Jain <anshulj@nvidia.com> | 2011-10-06 17:43:21 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:49:18 -0800 |
| commit | 25ff8cf8fae7de0a7a47afbe54ea4e298b93e66d (patch) | |
| tree | 1f100297a619b451b7aab35426ac817b882403c5 | |
| parent | b17acf0df1dbe6000972d4f66932db9a24b26b1c (diff) | |
arm: tegra: enable l2 cache data prefetch
Bug 874120
Change-Id: I17a1cc0d8f018246e5c7a99e01c2ab8d78e102ea
Reviewed-on: http://git-master/r/56520
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc9af15a0993dd6c9147e464d227e7446ed5a86a0
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 7361a2cfc3e7..6a6c08ad5519 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -202,7 +202,7 @@ void tegra_init_cache(void) #endif aux_ctrl = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (aux_ctrl & 0x700) << (17-8); - aux_ctrl |= 0x6C000001; + aux_ctrl |= 0x7C000001; l2x0_init(p, aux_ctrl, 0x8200c3fe); #endif } |