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mainboards: verdin-imx95: update LPDDR4x memory configurationErnest Van Hoecke6 weeks
 
 
AgeCommit messageAuthor
2025-10-07boards: verdin-imx95: update LPDDR4x memory configurationmainErnest Van Hoecke
2025-10-06boards: smarc-imx95: update LPDDR5 memory configurationFranz Schnyder
2025-10-06gitlab-ci.yml: add Toradex Aquila iMX95 boardFranz Schnyder
2025-10-06boards: add Toradex Aquila iMX95Franz Schnyder
2025-09-19gitlab-ci: Adopt CI for MR workflow to execute it in the scope of parent projectYuriy Erofeev
2025-07-31boards: toradex-(smarc|verdin)-imx95: Make default DDR file soc revision depe...João Paulo Gonçalves
2025-07-31board: toradex-verdin-imx95: Add LPDDR4 timings for B0 silicon revisionJoão Paulo Gonçalves
2025-07-31board: toradex-smarc-imx95: Add LPDDR5 timings for B0 silicon revisionJoão Paulo Gonçalves
2025-07-23Merge tag 'lf-6.6.52-2.2.1' into mainJoão Paulo Gonçalves
2025-07-08ddr: adjust the memory test to 1GB sizeViorel Suman
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