blob: 4daa9e5ff958f4bab870efd152488d1b297626f5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
|
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <mcucfg.h>
#include <mmio.h>
void disable_scu(unsigned long mpidr)
{
if (mpidr & MPIDR_CLUSTER_MASK)
mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg,
MP1_ACINACTM);
else
mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config,
MP0_ACINACTM);
}
void enable_scu(unsigned long mpidr)
{
if (mpidr & MPIDR_CLUSTER_MASK)
mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg,
MP1_ACINACTM);
else
mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config,
MP0_ACINACTM);
}
|