From 4cb65a20dcf1aea0f329b1855e31fb564ea80fd1 Mon Sep 17 00:00:00 2001 From: Teo Hall Date: Tue, 3 Jul 2018 12:33:34 -0500 Subject: MLK-18732-1: Update to the latest SCFW API Update API based on following commit: commit 24fa33d2f95707e739f01cc04d38a62bec707ceb Author: Chuck Cannon Date: Thu Jun 28 15:00:03 2018 -0500 SCF-105: Add disclaimer to docs. Signed-off-by: Chuck Cannon For use of the misc otp service Signed-off-by: Teo Hall --- plat/imx/common/include/sci/rpc.h | 24 +- plat/imx/common/include/sci/scfw.h | 1 + plat/imx/common/include/sci/sci.h | 2 + plat/imx/common/include/sci/svc/irq/api.h | 167 +++++++++ plat/imx/common/include/sci/svc/misc/api.h | 539 ++++++++++++++++++++++++++++ plat/imx/common/include/sci/svc/pad/api.h | 5 +- plat/imx/common/include/sci/svc/pm/api.h | 81 +++-- plat/imx/common/include/sci/svc/rm/api.h | 12 +- plat/imx/common/include/sci/svc/timer/api.h | 55 ++- plat/imx/common/include/sci/types.h | 18 +- 10 files changed, 852 insertions(+), 52 deletions(-) create mode 100755 plat/imx/common/include/sci/svc/irq/api.h create mode 100755 plat/imx/common/include/sci/svc/misc/api.h (limited to 'plat/imx/common/include') diff --git a/plat/imx/common/include/sci/rpc.h b/plat/imx/common/include/sci/rpc.h index 86ad904d..b90010ce 100644 --- a/plat/imx/common/include/sci/rpc.h +++ b/plat/imx/common/include/sci/rpc.h @@ -23,17 +23,17 @@ #define SC_RPC_MAX_MSG 8U -#define RPC_VER(MSG) ((MSG)->version) -#define RPC_SIZE(MSG) ((MSG)->size) -#define RPC_SVC(MSG) ((MSG)->svc) -#define RPC_FUNC(MSG) ((MSG)->func) -#define RPC_R8(MSG) ((MSG)->func) -#define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U]) -#define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U]) -#define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)]) -#define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U]) -#define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U]) -#define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)]) +#define RPC_VER(MESG) ((MESG)->version) +#define RPC_SIZE(MESG) ((MESG)->size) +#define RPC_SVC(MESG) ((MESG)->svc) +#define RPC_FUNC(MESG) ((MESG)->func) +#define RPC_R8(MESG) ((MESG)->func) +#define RPC_I32(MESG, IDX) ((MESG)->DATA.i32[(IDX) / 4U]) +#define RPC_I16(MESG, IDX) ((MESG)->DATA.i16[(IDX) / 2U]) +#define RPC_I8(MESG, IDX) ((MESG)->DATA.i8[(IDX)]) +#define RPC_U32(MESG, IDX) ((MESG)->DATA.u32[(IDX) / 4U]) +#define RPC_U16(MESG, IDX) ((MESG)->DATA.u16[(IDX) / 2U]) +#define RPC_U8(MESG, IDX) ((MESG)->DATA.u8[(IDX)]) #define SC_RPC_SVC_UNKNOWN 0U #define SC_RPC_SVC_RETURN 1U @@ -96,7 +96,7 @@ typedef struct sc_rpc_async_msg_s { * If \a no_resp is SC_FALSE then this function waits for a response * and returns the result in \a msg. */ -void sc_call_rpc(sc_ipc_t ipc, sc_rpc_msg_t *msg, bool no_resp); +void sc_call_rpc(sc_ipc_t ipc, sc_rpc_msg_t *msg, sc_bool_t no_resp); /*! * This is an internal function to dispath an RPC call that has diff --git a/plat/imx/common/include/sci/scfw.h b/plat/imx/common/include/sci/scfw.h index 30756059..6d699c35 100755 --- a/plat/imx/common/include/sci/scfw.h +++ b/plat/imx/common/include/sci/scfw.h @@ -33,6 +33,7 @@ /* Includes */ +#include #include #ifdef __cplusplus diff --git a/plat/imx/common/include/sci/sci.h b/plat/imx/common/include/sci/sci.h index 1c33eea0..6622b3ae 100644 --- a/plat/imx/common/include/sci/sci.h +++ b/plat/imx/common/include/sci/sci.h @@ -41,6 +41,8 @@ #include #include #include +#include +#include #ifdef PLAT_IMX8QM #define MU_BASE_ADDR(id) ((0x5D1B0000UL + (id*0x10000))) diff --git a/plat/imx/common/include/sci/svc/irq/api.h b/plat/imx/common/include/sci/svc/irq/api.h new file mode 100755 index 00000000..4f333493 --- /dev/null +++ b/plat/imx/common/include/sci/svc/irq/api.h @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * Header file containing the public API for the System Controller (SC) + * Interrupt (IRQ) function. + * + * @addtogroup IRQ_SVC (SVC) Interrupt Service + * + * Module for the Interrupt (IRQ) service. + * + * @{ + */ + +#ifndef SC_IRQ_API_H +#define SC_IRQ_API_H + +/* Includes */ + +#include + +/* Defines */ + +#define SC_IRQ_NUM_GROUP 5U /* Number of groups */ + +/*! + * @name Defines for sc_irq_group_t + */ +/*@{*/ +#define SC_IRQ_GROUP_TEMP 0U /* Temp interrupts */ +#define SC_IRQ_GROUP_WDOG 1U /* Watchdog interrupts */ +#define SC_IRQ_GROUP_RTC 2U /* RTC interrupts */ +#define SC_IRQ_GROUP_WAKE 3U /* Wakeup interrupts */ +#define SC_IRQ_GROUP_SYSCTR 4U /* System counter interrupts */ +/*@}*/ + +/*! + * @name Defines for sc_irq_temp_t + */ +/*@{*/ +#define SC_IRQ_TEMP_HIGH (1U << 0U) /* Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_HIGH (1U << 1U) /* CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_HIGH (1U << 2U) /* CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_HIGH (1U << 3U) /* GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_HIGH (1U << 4U) /* GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_HIGH (1U << 5U) /* DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_HIGH (1U << 6U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_HIGH (1U << 7U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_HIGH (1U << 8U) /* PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_HIGH (1U << 9U) /* PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_LOW (1U << 10U) /* Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_LOW (1U << 11U) /* CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_LOW (1U << 12U) /* CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_LOW (1U << 13U) /* GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_LOW (1U << 14U) /* GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_LOW (1U << 15U) /* DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_LOW (1U << 16U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_LOW (1U << 17U) /* DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_LOW (1U << 18U) /* PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_LOW (1U << 19U) /* PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_HIGH (1U << 20U) /* PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_LOW (1U << 21U) /* PMIC2 temp alarm interrupt */ +/*@}*/ + +/*! + * @name Defines for sc_irq_wdog_t + */ +/*@{*/ +#define SC_IRQ_WDOG (1U << 0U) /* Watchdog interrupt */ +/*@}*/ + +/*! + * @name Defines for sc_irq_rtc_t + */ +/*@{*/ +#define SC_IRQ_RTC (1U << 0U) /* RTC interrupt */ +/*@}*/ + +/*! + * @name Defines for sc_irq_wake_t + */ +/*@{*/ +#define SC_IRQ_BUTTON (1U << 0U) /* Button interrupt */ +#define SC_IRQ_PAD (1U << 1U) /* Pad wakeup */ +/*@}*/ + +/*! + * @name Defines for sc_irq_sysctr_t + */ +/*@{*/ +#define SC_IRQ_SYSCTR (1U << 0U) /* SYSCTR interrupt */ +/*@}*/ + +/* Types */ + +/*! + * This type is used to declare an interrupt group. + */ +typedef uint8_t sc_irq_group_t; + +/*! + * This type is used to declare a bit mask of temp interrupts. + */ +typedef uint8_t sc_irq_temp_t; + +/*! + * This type is used to declare a bit mask of watchdog interrupts. + */ +typedef uint8_t sc_irq_wdog_t; + +/*! + * This type is used to declare a bit mask of RTC interrupts. + */ +typedef uint8_t sc_irq_rtc_t; + +/*! + * This type is used to declare a bit mask of wakeup interrupts. + */ +typedef uint8_t sc_irq_wake_t; + +/* Functions */ + +/*! + * This function enables/disables interrupts. If pending interrupts + * are unmasked, an interrupt will be triggered. + * + * @param[in] ipc IPC handle + * @param[in] resource MU channel + * @param[in] group group the interrupts are in + * @param[in] mask mask of interrupts to affect + * @param[in] enable state to change interrupts to + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if group invalid + */ +sc_err_t sc_irq_enable(sc_ipc_t ipc, sc_rsrc_t resource, + sc_irq_group_t group, uint32_t mask, sc_bool_t enable); + +/*! + * This function returns the current interrupt status (regardless if + * masked). Automatically clears pending interrupts. + * + * @param[in] ipc IPC handle + * @param[in] resource MU channel + * @param[in] group groups the interrupts are in + * @param[in] status status of interrupts + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if group invalid + * + * The returned \a status may show interrupts pending that are + * currently masked. + */ +sc_err_t sc_irq_status(sc_ipc_t ipc, sc_rsrc_t resource, + sc_irq_group_t group, uint32_t *status); + +#endif /* SC_IRQ_API_H */ + +/**@}*/ diff --git a/plat/imx/common/include/sci/svc/misc/api.h b/plat/imx/common/include/sci/svc/misc/api.h new file mode 100755 index 00000000..8c0257c3 --- /dev/null +++ b/plat/imx/common/include/sci/svc/misc/api.h @@ -0,0 +1,539 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*! + * Header file containing the public API for the System Controller (SC) + * Miscellaneous (MISC) function. + * + * @addtogroup MISC_SVC (SVC) Miscellaneous Service + * + * Module for the Miscellaneous (MISC) service. + * + * @{ + */ + +#ifndef SC_MISC_API_H +#define SC_MISC_API_H + +/* Includes */ + +#include +#include + +/* Defines */ + +/*! + * @name Defines for type widths + */ +/*@{*/ +#define SC_MISC_DMA_GRP_W 5U /* Width of sc_misc_dma_group_t */ +/*@}*/ + +/*! Max DMA channel priority group */ +#define SC_MISC_DMA_GRP_MAX 31U + +/*! + * @name Defines for sc_misc_boot_status_t + */ +/*@{*/ +#define SC_MISC_BOOT_STATUS_SUCCESS 0U /* Success */ +#define SC_MISC_BOOT_STATUS_SECURITY 1U /* Security violation */ +/*@}*/ + +/*! + * @name Defines for sc_misc_seco_auth_cmd_t + */ +/*@{*/ +#define SC_MISC_SECO_AUTH_SECO_FW 0U /* SECO Firmware */ +#define SC_MISC_SECO_AUTH_HDMI_TX_FW 1U /* HDMI TX Firmware */ +#define SC_MISC_SECO_AUTH_HDMI_RX_FW 2U /* HDMI RX Firmware */ +/*@}*/ + +/*! + * @name Defines for sc_misc_temp_t + */ +/*@{*/ +#define SC_MISC_TEMP 0U /* Temp sensor */ +#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */ +#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */ +/*@}*/ + +/*! + * @name Defines for sc_misc_seco_auth_cmd_t + */ +/*@{*/ +#define SC_MISC_AUTH_CONTAINER 0U /* Authenticate container */ +#define SC_MISC_VERIFY_IMAGE 1U /* Verify image */ +#define SC_MISC_REL_CONTAINER 2U /* Release container */ +/*@}*/ + +/* Types */ + +/*! + * This type is used to store a DMA channel priority group. + */ +typedef uint8_t sc_misc_dma_group_t; + +/*! + * This type is used report boot status. + */ +typedef uint8_t sc_misc_boot_status_t; + +/*! + * This type is used to issue SECO authenticate commands. + */ +typedef uint8_t sc_misc_seco_auth_cmd_t; + +/*! + * This type is used report boot status. + */ +typedef uint8_t sc_misc_temp_t; + +/* Functions */ + +/*! + * @name Control Functions + * @{ + */ + +/*! + * This function sets a miscellaneous control value. + * + * @param[in] ipc IPC handle + * @param[in] resource resource the control is associated with + * @param[in] ctrl control to change + * @param[in] val value to apply to the control + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the resource owner or parent + * of the owner + * + * Refer to the [Control List](@ref CONTROLS) for valid control values. + */ +sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, + sc_ctrl_t ctrl, uint32_t val); + +/*! + * This function gets a miscellaneous control value. + * + * @param[in] ipc IPC handle + * @param[in] resource resource the control is associated with + * @param[in] ctrl control to get + * @param[out] val pointer to return the control value + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the resource owner or parent + * of the owner + * + * Refer to the [Control List](@ref CONTROLS) for valid control values. + */ +sc_err_t sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, + sc_ctrl_t ctrl, uint32_t *val); + +/* @} */ + +/*! + * @name DMA Functions + * @{ + */ + +/*! + * This function configures the max DMA channel priority group for a + * partition. + * + * @param[in] ipc IPC handle + * @param[in] pt handle of partition to assign \a max + * @param[in] max max priority group (0-31) + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the parent + * of the affected partition + * + * Valid \a max range is 0-31 with 0 being the lowest and 31 the highest. + * Default is the max priority group for the parent partition of \a pt. + */ +sc_err_t sc_misc_set_max_dma_group(sc_ipc_t ipc, sc_rm_pt_t pt, + sc_misc_dma_group_t max); + +/*! + * This function configures the priority group for a DMA channel. + * + * @param[in] ipc IPC handle + * @param[in] resource DMA channel resource + * @param[in] group priority group (0-31) + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the owner or parent + * of the owner of the DMA channel + * + * Valid \a group range is 0-31 with 0 being the lowest and 31 the highest. + * The max value of \a group is limited by the partition max set using + * sc_misc_set_max_dma_group(). + */ +sc_err_t sc_misc_set_dma_group(sc_ipc_t ipc, sc_rsrc_t resource, + sc_misc_dma_group_t group); + +/* @} */ + +/*! + * @name Security Functions + * @{ + */ + +/*! + * This function loads a SECO image. + * + * @param[in] ipc IPC handle + * @param[in] addr_src address of image source + * @param[in] addr_dst address of image destination + * @param[in] len lenth of image to load + * @param[in] fw SC_TRUE = firmware load + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid + * - SC_ERR_UNAVAILABLE if SECO not available + * + * This is used to load images via the SECO. Examples include SECO + * Firmware and IVT/CSF data used for authentication. These are usually + * loaded into SECO TCM. \a addr_src is in secure memory. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src, + sc_faddr_t addr_dst, uint32_t len, + sc_bool_t fw); + +/*! + * This function is used to authenticate a SECO image or command. + * + * @param[in] ipc IPC handle + * @param[in] cmd authenticate command + * @param[in] addr address of/or metadata + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid + * - SC_ERR_UNAVAILABLE if SECO not available + * + * This is used to authenticate a SECO image or issue a security + * command. \a addr often points to an container. It is also + * just data (or even unused) for some commands. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_authenticate(sc_ipc_t ipc, + sc_misc_seco_auth_cmd_t cmd, + sc_faddr_t addr); + +/*! + * This function securely writes a group of fuse words. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available + * + * Note \a addr must be a pointer to a signed message block. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function securely enables debug. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available + * + * Note \a addr must be a pointer to a signed message block. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function updates the lifecycle of the device. + * + * @param[in] ipc IPC handle + * @param[in] lifecycle new lifecycle + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available + * + * This message is used for going from Open to NXP Closed to OEM Closed. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t lifecycle); + +/*! + * This function updates the lifecycle to one of the return lifecycles. + * + * @param[in] ipc IPC handle + * @param[in] addr address of message block + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_UNAVAILABLE if SECO not available + * + * Note \a addr must be a pointer to a signed message block. + * + * To switch back to NXP states (Full Field Return), message must be signed + * by NXP SRK. For OEM States (Partial Field Return), must be signed by OEM + * SRK. + * + * See the Security Reference Manual (SRM) for more info. + */ +sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr); + +/*! + * This function is used to return the SECO FW build info. + * + * @param[in] ipc IPC handle + * @param[out] version pointer to return build number + * @param[out] commit pointer to return commit ID (git SHA-1) + */ +void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit); + +/*! + * This function is used to return SECO chip info. + * + * @param[in] ipc IPC handle + * @param[out] lc pointer to return lifecycle + * @param[out] monotonic pointer to return monotonic counter + * @param[out] uid_l pointer to return UID (lower 32 bits) + * @param[out] uid_h pointer to return UID (upper 32 bits) + */ +sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, + uint16_t *monotonic, uint32_t *uid_l, + uint32_t *uid_h); + +/* @} */ + +/*! + * @name Debug Functions + * @{ + */ + +/*! + * This function is used output a debug character from the SCU UART. + * + * @param[in] ipc IPC handle + * @param[in] ch character to output + */ +void sc_misc_debug_out(sc_ipc_t ipc, uint8_t ch); + +/*! + * This function starts/stops emulation waveform capture. + * + * @param[in] ipc IPC handle + * @param[in] enable flag to enable/disable capture + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_UNAVAILABLE if not running on emulation + */ +sc_err_t sc_misc_waveform_capture(sc_ipc_t ipc, sc_bool_t enable); + +/*! + * This function is used to return the SCFW build info. + * + * @param[in] ipc IPC handle + * @param[out] build pointer to return build number + * @param[out] commit pointer to return commit ID (git SHA-1) + */ +void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build, uint32_t *commit); + +/*! + * This function is used to return the device's unique ID. + * + * @param[in] ipc IPC handle + * @param[out] id_l pointer to return lower 32-bit of ID [31:0] + * @param[out] id_h pointer to return upper 32-bits of ID [63:32] + */ +void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l, uint32_t *id_h); + +/* @} */ + +/*! + * @name Other Functions + * @{ + */ + +/*! + * This function configures the ARI match value for PCIe/SATA resources. + * + * @param[in] ipc IPC handle + * @param[in] resource match resource + * @param[in] resource_mst PCIe/SATA master to match + * @param[in] ari ARI to match + * @param[in] enable enable match or not + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the owner or parent + * of the owner of the resource and translation + * + * For PCIe, the ARI is the 16-bit value that includes the bus number, + * device number, and function number. For SATA, this value includes the + * FISType and PM_Port. + */ +sc_err_t sc_misc_set_ari(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rsrc_t resource_mst, uint16_t ari, + sc_bool_t enable); + +/*! + * This function reports boot status. + * + * @param[in] ipc IPC handle + * @param[in] status boot status + * + * This is used by SW partitions to report status of boot. This is + * normally used to report a boot failure. + */ +void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status); + +/*! + * This function tells the SCFW that a CPU is done booting. + * + * @param[in] ipc IPC handle + * @param[in] cpu CPU that is done booting + * + * This is called by early booting CPUs to report they are done with + * initialization. After starting early CPUs, the SCFW halts the + * booting process until they are done. During this time, early + * CPUs can call the SCFW with lower latency as the SCFW is idle. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_PARM if arguments out of range or invalid, + * - SC_ERR_NOACCESS if caller's partition is not the CPU owner + */ +sc_err_t sc_misc_boot_done(sc_ipc_t ipc, sc_rsrc_t cpu); + +/*! + * This function reads a given fuse word index. + * + * @param[in] ipc IPC handle + * @param[in] word fuse word index + * @param[out] val fuse read value + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid + * - SC_ERR_NOACCESS if read operation failed + * - SC_ERR_LOCKED if read operation is locked + */ +sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val); + +/*! + * This function writes a given fuse word index. + * + * @param[in] ipc IPC handle + * @param[in] word fuse word index + * @param[in] val fuse write value + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if word fuse index param out of range or invalid + * - SC_ERR_NOACCESS if write operation failed + * - SC_ERR_LOCKED if write operation is locked + */ +sc_err_t sc_misc_otp_fuse_write(sc_ipc_t ipc, uint32_t word, uint32_t val); + +/*! + * This function sets a temp sensor alarm. + * + * @param[in] ipc IPC handle + * @param[in] resource resource with sensor + * @param[in] temp alarm to set + * @param[in] celsius whole part of temp to set + * @param[in] tenths fractional part of temp to set + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * This function will enable the alarm interrupt if the temp requested is + * not the min/max temp. This enable automatically clears when the alarm + * occurs and this function has to be called again to re-enable. + * + * Return errors codes: + * - SC_ERR_PARM if parameters invalid + */ +sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, + sc_misc_temp_t temp, int16_t celsius, int8_t tenths); + +/*! + * This function gets a temp sensor value. + * + * @param[in] ipc IPC handle + * @param[in] resource resource with sensor + * @param[in] temp value to get (sensor or alarm) + * @param[out] celsius whole part of temp to get + * @param[out] tenths fractional part of temp to get + * + * @return Returns and error code (SC_ERR_NONE = success). + * + * Return errors codes: + * - SC_ERR_PARM if parameters invalid + */ +sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, + sc_misc_temp_t temp, int16_t * celsius, + int8_t * tenths); + +/*! + * This function returns the boot device. + * + * @param[in] ipc IPC handle + * @param[out] dev pointer to return boot device + */ +void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t * dev); + +/*! + * This function returns the current status of the ON/OFF button. + * + * @param[in] ipc IPC handle + * @param[out] status pointer to return button status + */ +void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status); + +/* @} */ + +#endif /* SC_MISC_API_H */ + +/**@}*/ diff --git a/plat/imx/common/include/sci/svc/pad/api.h b/plat/imx/common/include/sci/svc/pad/api.h index 58f2c24c..3586a653 100644 --- a/plat/imx/common/include/sci/svc/pad/api.h +++ b/plat/imx/common/include/sci/svc/pad/api.h @@ -50,6 +50,9 @@ * * Note muxing two input pads to the same IP functional signal will * result in undefined behavior. + * + * @includedoc pad/details.dox + * * @{ */ @@ -67,7 +70,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PAD_MUX_W 3 /* Width of mux parameter */ +#define SC_PAD_MUX_W 3U /* Width of mux parameter */ /*@}*/ /*! diff --git a/plat/imx/common/include/sci/svc/pm/api.h b/plat/imx/common/include/sci/svc/pm/api.h index b12c03e3..0460251a 100644 --- a/plat/imx/common/include/sci/svc/pm/api.h +++ b/plat/imx/common/include/sci/svc/pm/api.h @@ -14,6 +14,8 @@ * * Module for the Power Management (PM) service. * + * @includedoc pm/details.dox + * * @{ */ @@ -31,10 +33,10 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PM_POWER_MODE_W 2 /* Width of sc_pm_power_mode_t */ -#define SC_PM_CLOCK_MODE_W 3 /* Width of sc_pm_clock_mode_t */ -#define SC_PM_RESET_TYPE_W 2 /* Width of sc_pm_reset_type_t */ -#define SC_PM_RESET_REASON_W 3 /* Width of sc_pm_reset_reason_t */ +#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */ /*@}*/ /*! @@ -111,29 +113,23 @@ #define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */ /*@}*/ -/*! - * @name Defines for sc_pm_reset_cause_t - */ -/*@{*/ -#define SC_PM_RESET_CAUSE_TEMP 0U /* Reset due to temp panic alarm */ -#define SC_PM_RESET_CAUSE_FAULT 1U /* Reset due to fault exception */ -#define SC_PM_RESET_CAUSE_IRQ 2U /* Reset due to SCU reset IRQ */ -#define SC_PM_RESET_CAUSE_WDOG 3U /* Reset due to SW WDOG */ -#define SC_PM_RESET_CAUSE_API 4U /* Reset due to pm_reset() or monitor */ -/*@}*/ - /*! * @name Defines for sc_pm_reset_reason_t */ /*@{*/ #define SC_PM_RESET_REASON_POR 0U /* Power on reset */ -#define SC_PM_RESET_REASON_WARM 1U /* Warm reset */ +#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */ #define SC_PM_RESET_REASON_SW 2U /* Software reset */ -#define SC_PM_RESET_REASON_WDOG 3U /* Watchdog reset */ -#define SC_PM_RESET_REASON_LOCKUP 4U /* Lockup reset */ -#define SC_PM_RESET_REASON_TAMPER 5U /* Tamper reset */ -#define SC_PM_RESET_REASON_TEMP 6U /* Temp reset */ -#define SC_PM_RESET_REASON_LOW_VOLT 7U /* Low voltage reset */ +#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */ +#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */ +#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */ +#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */ +#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */ +#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */ +#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */ +#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */ +#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */ +#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */ /*@}*/ /*! @@ -191,11 +187,6 @@ typedef uint32_t sc_pm_clock_rate_t; */ typedef uint8_t sc_pm_reset_type_t; -/*! - * This type is used to declare a desired reset type. - */ -typedef uint8_t sc_pm_reset_cause; - /*! * This type is used to declare a reason for a reset. */ @@ -286,6 +277,9 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_NOACCESS if caller's partition is not the resource owner * or parent of the owner * + * Resources must be at SC_PM_PW_MODE_LP mode or higher to access them, + * otherwise the master will get a bus error or hang. + * * This function will record the individual resource power mode * and change it if the requested mode is lower than or equal to the * partition power mode set with sc_pm_set_partition_power_mode(). @@ -307,6 +301,34 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode); +/*! +* This function sets the power mode for all the resources owned +* by a child partition. +* +* @param[in] ipc IPC handle +* @param[in] pt handle of child partition +* @param[in] mode power mode to apply +* @param[in] exclude resource to exclude +* +* @return Returns an error code (SC_ERR_NONE = success). +* +* Return errors: +* - SC_ERR_PARM if invalid partition or mode, +* - SC_ERR_NOACCESS if caller's partition is not the parent +* of \a pt +* +* This functions loops through all the resources owned by \a pt +* and sets the power mode to \a mode. It will skip setting +* \a exclude (SC_R_LAST to skip none). +* +* This function can only be called by the parent. It is used to +* implement some aspects of virtualization. +*/ +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, + sc_rm_pt_t pt, + sc_pm_power_mode_t mode, + sc_rsrc_t exclude); + /*! * This function gets the power mode of a resource. * @@ -579,6 +601,13 @@ sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type); * @param[in] ipc IPC handle * @param[out] reason pointer to return reset reason * + * This function returns the reason a partition was reset. If the reason + * is POR, then the system reset reason will be returned. + * + * Note depending on the connection of the WDOG_OUT signal and the OTP + * programming of the PMIC, some reset reasons my trigger a system POR + * and the original reason will be lost. + * * @return Returns an error code (SC_ERR_NONE = success). */ sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason); diff --git a/plat/imx/common/include/sci/svc/rm/api.h b/plat/imx/common/include/sci/svc/rm/api.h index 9c42087b..106aebb0 100644 --- a/plat/imx/common/include/sci/svc/rm/api.h +++ b/plat/imx/common/include/sci/svc/rm/api.h @@ -32,12 +32,12 @@ * @name Defines for type widths */ /*@{*/ -#define SC_RM_PARTITION_W 5 /* Width of sc_rm_pt_t */ -#define SC_RM_MEMREG_W 6 /* Width of sc_rm_mr_t */ -#define SC_RM_DID_W 4 /* Width of sc_rm_did_t */ -#define SC_RM_SID_W 6 /* Width of sc_rm_sid_t */ -#define SC_RM_SPA_W 2 /* Width of sc_rm_spa_t */ -#define SC_RM_PERM_W 3 /* Width of sc_rm_perm_t */ +#define SC_RM_PARTITION_W 5U /* Width of sc_rm_pt_t */ +#define SC_RM_MEMREG_W 6U /* Width of sc_rm_mr_t */ +#define SC_RM_DID_W 4U /* Width of sc_rm_did_t */ +#define SC_RM_SID_W 6U /* Width of sc_rm_sid_t */ +#define SC_RM_SPA_W 2U /* Width of sc_rm_spa_t */ +#define SC_RM_PERM_W 3U /* Width of sc_rm_perm_t */ /*@}*/ /*! diff --git a/plat/imx/common/include/sci/svc/timer/api.h b/plat/imx/common/include/sci/svc/timer/api.h index 276e31d6..5b2cb9b3 100644 --- a/plat/imx/common/include/sci/svc/timer/api.h +++ b/plat/imx/common/include/sci/svc/timer/api.h @@ -32,7 +32,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_TIMER_ACTION_W 3 /* Width of sc_timer_wdog_action_t */ +#define SC_TIMER_ACTION_W 3U /* Width of sc_timer_wdog_action_t */ /*@}*/ /*! @@ -262,7 +262,7 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t sec); /*! - * This function sets the RTC alarm. + * This function sets the RTC alarm (periodic mode). * * @param[in] ipc IPC handle * @param[in] sec period in seconds @@ -275,7 +275,7 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, sc_err_t sc_timer_set_rtc_periodic_alarm(sc_ipc_t ipc, uint32_t sec); /*! - * This function sets the RTC alarm. + * This function cancels the RTC alarm. * * @param[in] ipc IPC handle * @@ -305,6 +305,55 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count); /* @} */ +/*! + * @name System Counter (SYSCTR) Functions + * @{ + */ + +/*! + * This function sets the SYSCTR alarm. + * + * @param[in] ipc IPC handle + * @param[in] ticks number of 8MHz cycles + * + * Note this alarm setting clears when the alarm is triggered. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks); + +/*! + * This function sets the SYSCTR alarm (periodic mode). + * + * @param[in] ipc IPC handle + * @param[in] ticks number of 8MHz cycles + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, uint64_t ticks); + +/*! + * This function cancels the SYSCTR alarm. + * + * @param[in] ipc IPC handle + * + * Note this alarm setting clears when the alarm is triggered. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc); + +/* @} */ + #endif /* SC_TIMER_API_H */ /**@}*/ diff --git a/plat/imx/common/include/sci/types.h b/plat/imx/common/include/sci/types.h index 426e806e..cbdd6ff5 100644 --- a/plat/imx/common/include/sci/types.h +++ b/plat/imx/common/include/sci/types.h @@ -72,7 +72,7 @@ #define SC_850MHZ 850000000U /* 850MHz */ #define SC_900MHZ 900000000U /* 900MHz */ #define SC_1000MHZ 1000000000U /* 1GHz */ -#define SC_1056MHZ 1056000000U /* 1.056GHz */ +#define SC_1060MHZ 1060000000U /* 1.06GHz */ #define SC_1188MHZ 1188000000U /* 1.188GHz */ #define SC_1260MHZ 1260000000U /* 1.26GHz */ #define SC_1280MHZ 1280000000U /* 1.28GHz */ @@ -113,6 +113,7 @@ #define SC_864MHZ 864000000U /* 864MHz */ #define SC_960MHZ 960000000U /* 960MHz */ #define SC_1056MHZ 1056000000U /* 1056MHz */ +#define SC_1104MHZ 1104000000U /* 1104MHz */ #define SC_1200MHZ 1200000000U /* 1.2GHz */ #define SC_1464MHZ 1464000000U /* 1.464GHz */ #define SC_2400MHZ 2400000000U /* 2.4GHz */ @@ -141,8 +142,8 @@ * @name Defines for sc_bool_t */ /*@{*/ -#define SC_FALSE ((sc_bool_t) 0U) /* True */ -#define SC_TRUE ((sc_bool_t) 1U) /* False */ +#define SC_FALSE ((sc_bool_t) 0U) /* False */ +#define SC_TRUE ((sc_bool_t) 1U) /* True */ /*@}*/ /*! @@ -764,7 +765,16 @@ #define SC_C_RST0 43U #define SC_C_RST1 44U #define SC_C_SEL0 45U -#define SC_C_LAST 46U +#define SC_C_CALIB0 46U +#define SC_C_CALIB1 47U +#define SC_C_CALIB2 48U +#define SC_C_IPG_DEBUG 49U +#define SC_C_IPG_DOZE 50U +#define SC_C_IPG_WAIT 51U +#define SC_C_IPG_STOP 52U +#define SC_C_IPG_STOP_MODE 53U +#define SC_C_IPG_STOP_ACK 54U +#define SC_C_LAST 55U #define SC_P_ALL ((sc_pad_t) UINT16_MAX) /* All pads */ -- cgit v1.2.3