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imx-atf.git
imx_4.14.78_1.0.0_ga
imx_4.9.51_imx8_beta1
imx_5.4.24_2.1.0
toradex_imx_5.4.24_2.1.0
toradex_imx_5.4.70_2.3.0
Reference implementation of ARM secure world software for i.MX
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2018-02-21
Ensure the correct execution of TLBI instructions
Antonio Nino Diaz
2017-07-12
Fix order of #includes
Isla Mitchell
2017-06-28
Merge pull request #978 from etienne-lms/minor-build
danh-arm
2017-06-23
bl1: include bl1_private.h in aarch* files
Etienne Carriere
2017-06-21
Fully initialise essential control registers
David Cunado
2017-05-11
Merge pull request #927 from jeenu-arm/state-switch
davidcunado-arm
2017-05-03
Use SPDX license identifiers
dp-arm
2017-05-02
Add macro to check whether the CPU implements an EL
Jeenu Viswambharan
2016-12-05
Define and use no_ret macro where no return is expected
Jeenu Viswambharan
2016-09-21
AArch32: Add generic changes in BL1
Yatharth Kochar
2016-08-22
Remove looping around `plat_report_exception`
Yatharth Kochar
2016-05-26
Introduce some helper macros for exception vectors
Sandrine Bailleux
2016-03-30
Enable asynchronous abort exceptions during boot
Gerald Lejeune
2015-12-09
FWU: Add Generic Firmware Update framework support in BL1
Yatharth Kochar
2015-12-09
Add descriptor based image management support in BL1
Yatharth Kochar
2015-12-09
Move context management code to common location
Yatharth Kochar
2015-11-26
Introduce COLD_BOOT_SINGLE_CPU build option
Sandrine Bailleux
2015-11-26
Pass the entry point info to bl1_plat_prepare_exit()
Sandrine Bailleux
2015-11-26
Introduce SPIN_ON_BL1_EXIT build flag
Sandrine Bailleux
2015-11-02
Improve display_boot_progress() function
Sandrine Bailleux
2015-10-20
Add optional bl1_plat_prepare_exit() API
Juan Castillo
2015-10-19
Break down BL1 AArch64 synchronous exception handler
Sandrine Bailleux
2015-06-04
Introduce PROGRAMMABLE_RESET_ADDRESS build option
Sandrine Bailleux
2015-06-04
Rationalize reset handling code
Sandrine Bailleux
2015-04-08
Add support to indicate size and end of assembly functions
Kévin Petit
2015-01-22
Remove coherent memory from the BL memory maps
Soby Mathew
2014-08-27
Miscellaneous documentation fixes
Sandrine Bailleux
2014-08-20
Introduce framework for CPU specific operations
Soby Mathew
2014-08-15
Unmask SError interrupt and clear SCR_EL3.EA bit
Achin Gupta
2014-07-28
Simplify management of SCTLR_EL3 and SCTLR_EL1
Achin Gupta
2014-07-19
Remove coherent stack usage from the cold boot path
Achin Gupta
2014-06-27
Merge pull request #151 from vikramkanigiri/vk/t133-code-readability
Andrew Thoelke
2014-06-24
Remove all checkpatch errors from codebase
Juan Castillo
2014-06-24
Simplify entry point information generation code on FVP
Vikram Kanigiri
2014-06-23
Initialise CPU contexts from entry_point_info
Andrew Thoelke
2014-05-22
Add support for BL3-1 as a reset vector
Vikram Kanigiri
2014-05-22
Populate BL31 input parameters as per new spec
Vikram Kanigiri
2014-05-22
Rework handover interface between BL stages
Vikram Kanigiri
2014-05-08
Merge pull request #62 from athoelke/set-little-endian-v2
danh-arm
2014-05-07
Access system registers directly in assembler
Andrew Thoelke
2014-05-07
Replace disable_mmu with assembler version
Andrew Thoelke
2014-05-07
Correct usage of data and instruction barriers
Andrew Thoelke
2014-05-07
Set processor endianness immediately after RESET
Andrew Thoelke
2014-05-06
Reduce deep nesting of header files
Dan Handley
2014-04-15
Merge pull request #36 from athoelke/at/gc-sections-80
danh-arm
2014-04-08
Define frequency of system counter in platform code
Sandrine Bailleux
2014-04-08
Revert "Move architecture timer setup to platform-specific code"
Sandrine Bailleux
2014-03-26
Place assembler functions in separate sections
Andrew Thoelke
2014-03-26
Separate out BL2, BL3-1 and BL3-2 early exception vectors from BL1
Sandrine Bailleux
2014-03-21
Remove partially qualified asm helper functions
Vikram Kanigiri
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