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author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-09-22 08:32:09 +0100 |
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committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-10-16 16:50:01 +0100 |
commit | fa9db4230aef4411cc6c56557f0c407326421876 (patch) | |
tree | 6ae9acc76ecca1db193c939e2b0d4ee538f2f52d /plat/xilinx/zynqmp/aarch64/zynqmp_common.c | |
parent | eb68ea9b10c190c237216dee92166f9e7b2ce3d4 (diff) |
GICv2: Add driver API to set PE target mask
The PE target mask is used to translate linear PE index (returned by
platform core position) to a bit mask used when targeting interrupts to
a PE, viz. when raising SGIs and routing SPIs.
The platform shall:
- Populate the driver data with a pointer to array that's to contain
per-PE target masks.
- Invoke the new driver API 'gicv2_set_pe_target_mask()' during
per-CPU initialization so that the driver populates the target mask
for that CPU.
Platforms that don't intend to target interrupts or raise SGIs need not
populate this.
Change-Id: Ic0db54da86915e9dccd82fff51479bc3c1fdc968
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'plat/xilinx/zynqmp/aarch64/zynqmp_common.c')
0 files changed, 0 insertions, 0 deletions