diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-07-18 15:42:50 +0100 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-08-02 14:10:35 +0100 |
| commit | 955242d8fff132769c677d9a807ff47cd6828b7e (patch) | |
| tree | c57d8d24bb569e954d2eb3cd077d7b9b2a2ac85a /plat/arm/board/fvp/include/platform_def.h | |
| parent | 1154586b71c1e0453076a50638f00d4499eb22b0 (diff) | |
FVP: Support Base FVP RevC
Revision C of the Base FVP has the same memory map as earlier revisions,
but has the following differences:
- Implements CCI550 instead of CCI400,
- Has a single instantiation of SMMUv3,
- CPU MPIDs are shifted left by one level, and has MT bit set in them.
The correct interconnect to program is chosen at run time based on the
FVP revision. Therefore, this patch implements FVP functions for
interconnect programming, rather than depending on ARM generic ones. The
macros used have been renamed to reflect this change.
Additionally, this patch initializes SMMUv3 as part of FVP early
platform setup.
New ARM config flags are introduced for feature queries at run time.
Change-Id: Ic7b7f080953a51fceaf62ce7daa6de0573801f09
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'plat/arm/board/fvp/include/platform_def.h')
| -rw-r--r-- | plat/arm/board/fvp/include/platform_def.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h index 7a7cf9e7..bf038e92 100644 --- a/plat/arm/board/fvp/include/platform_def.h +++ b/plat/arm/board/fvp/include/platform_def.h @@ -68,10 +68,17 @@ #define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART2_BASE #define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART2_CLK_IN_HZ +#define PLAT_FVP_SMMUV3_BASE 0x2b400000 + /* CCI related constants */ -#define PLAT_ARM_CCI_BASE 0x2c090000 -#define PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX 3 -#define PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX 4 +#define PLAT_FVP_CCI400_BASE 0x2c090000 +#define PLAT_FVP_CCI400_CLUS0_SL_PORT 3 +#define PLAT_FVP_CCI400_CLUS1_SL_PORT 4 + +/* CCI-500/CCI-550 on Base platform */ +#define PLAT_FVP_CCI5XX_BASE 0x2a000000 +#define PLAT_FVP_CCI5XX_CLUS0_SL_PORT 5 +#define PLAT_FVP_CCI5XX_CLUS1_SL_PORT 6 /* CCN related constants. Only CCN 502 is currently supported */ #define PLAT_ARM_CCN_BASE 0x2e000000 |