diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-09-22 08:32:09 +0100 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-10-16 16:50:01 +0100 |
| commit | dea417cdd640a3e258db3b817223ffaa5f53e416 (patch) | |
| tree | fa985ea8cb00c95864b222ddb12714f372687a97 | |
| parent | fa9db4230aef4411cc6c56557f0c407326421876 (diff) | |
ARM platforms: supply per-PE target mask array
Call the GICv2 driver API to initialise per-PE target mask.
Change-Id: Idc7eb0d906a5379f4c05917af05c90613057ab97
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
| -rw-r--r-- | plat/arm/common/arm_gicv2.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/plat/arm/common/arm_gicv2.c b/plat/arm/common/arm_gicv2.c index 521fa8cd..6dd847b2 100644 --- a/plat/arm/common/arm_gicv2.c +++ b/plat/arm/common/arm_gicv2.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -28,11 +28,15 @@ static const unsigned int g0_interrupt_array[] = { PLAT_ARM_G0_IRQS }; +static unsigned int target_mask_array[PLATFORM_CORE_COUNT]; + static const gicv2_driver_data_t arm_gic_data = { .gicd_base = PLAT_ARM_GICD_BASE, .gicc_base = PLAT_ARM_GICC_BASE, .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), .g0_interrupt_array = g0_interrupt_array, + .target_masks = target_mask_array, + .target_masks_num = ARRAY_SIZE(target_mask_array), }; /****************************************************************************** @@ -72,6 +76,7 @@ void plat_arm_gic_cpuif_disable(void) void plat_arm_gic_pcpu_init(void) { gicv2_pcpu_distif_init(); + gicv2_set_pe_target_mask(plat_my_core_pos()); } /****************************************************************************** |