diff options
author | Dominik Sliwa <dominik.sliwa@toradex.com> | 2017-05-16 14:31:59 +0200 |
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committer | Dominik Sliwa <dominik.sliwa@toradex.com> | 2017-05-16 14:31:59 +0200 |
commit | c9d5d6b248a12f7c6b66d8a64b93fb0c8c6cae4d (patch) | |
tree | dc9f3329f9fd2fc67aa8202b2d3cb4e537deb17d /startup/startup_MK20D10.S | |
parent | d0e5a94a55334b0a27652959fba5066f56128135 (diff) |
ksd:ksdk update to 2.2
This include FreeRTOS update to version 9.0.0
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Diffstat (limited to 'startup/startup_MK20D10.S')
-rw-r--r-- | startup/startup_MK20D10.S | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/startup/startup_MK20D10.S b/startup/startup_MK20D10.S index 849036b..11c3e09 100644 --- a/startup/startup_MK20D10.S +++ b/startup/startup_MK20D10.S @@ -2,14 +2,13 @@ /* @file: startup_MK20D10.s */ /* @purpose: CMSIS Cortex-M4 Core Device Startup File */ /* MK20D10 */ -/* @version: 1.8 */ -/* @date: 2014-10-14 */ -/* @build: b151210 */ +/* @version: 1.9 */ +/* @date: 2015-7-29 */ +/* @build: b170112 */ /* ---------------------------------------------------------------------------------------*/ /* */ -/* Copyright (c) 1997 - 2015 , Freescale Semiconductor, Inc. */ -/* All rights reserved. */ -/* */ +/* Copyright (c) 1997 - 2016, Freescale Semiconductor, Inc. */ +/* Copyright 2016 - 2017 NXP */ /* Redistribution and use in source and binary forms, with or without modification, */ /* are permitted provided that the following conditions are met: */ /* */ @@ -20,7 +19,7 @@ /* list of conditions and the following disclaimer in the documentation and/or */ /* other materials provided with the distribution. */ /* */ -/* o Neither the name of Freescale Semiconductor, Inc. nor the names of its */ +/* o Neither the name of the copyright holder nor the names of its */ /* contributors may be used to endorse or promote products derived from this */ /* software without specific prior written permission. */ /* */ @@ -328,6 +327,8 @@ Reset_Handler: ldr r0, =VTOR ldr r1, =__isr_vector str r1, [r0] + ldr r2, [r1] + msr msp, r2 #ifndef __NO_SYSTEM_INIT ldr r0,=SystemInit blx r0 |