1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
|
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
* 2015 Toradex AG
*
* Configuration settings for the Colibri iMX7 module.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __COLIBRI_IMX7_CONFIG_H
#define __COLIBRI_IMX7_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#include "mx7_common.h"
#include <asm/imx-common/gpio.h>
#define CONFIG_MX7
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_COLIBRI_IMX7
#define CONFIG_ROM_UNIFIED_SECTIONS
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_DBG_MONITOR
/* uncomment for PLUGIN mode support */
/* #define CONFIG_USE_PLUGIN */
/* uncomment for SECURE mode support */
/* #define CONFIG_SECURE_BOOT */
#ifdef CONFIG_SECURE_BOOT
#ifndef CONFIG_CSF_SIZE
#define CONFIG_CSF_SIZE 0x4000
#endif
#endif
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SERIAL_TAG
#define CONFIG_SERIAL_TAG_BOARD
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MXC_GPIO
#define CONFIG_CMD_GPIO
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* Make the HW version stuff available in u-boot env */
#define CONFIG_VERSION_VARIABLE /* ver environment variable */
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* I2C configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* OCOTP Configs */
#define CONFIG_CMD_FUSE
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT3
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_DOS_PARTITION
#define PHYS_SDRAM_SIZE SZ_2G
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_FEC_DMA_MINALIGN 64
#define CONFIG_TFTP_TSIZE
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 16384
/* ENET1 */
#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#undef CONFIG_BOOTM_NETBSD
#undef CONFIG_BOOTM_PLAN9
#undef CONFIG_BOOTM_RTEMS
#undef CONFIG_CMD_EXPORTENV
#undef CONFIG_CMD_IMPORTENV
/* USB Configs */
/* Host */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX7
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_KEYBOARD
#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL
#endif /* CONFIG_USB_KEYBOARD */
/* Client */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CI_UDC
#define CONFIG_USBD_HS
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_TRDX_VID 0x1B67
#define CONFIG_TRDX_PID_COLIBRI_IMX6 0x0027
#define CONFIG_G_DNL_MANUFACTURER "Toradex"
#define CONFIG_G_DNL_VENDOR_NUM CONFIG_TRDX_VID
#define CONFIG_G_DNL_PRODUCT_NUM CONFIG_TRDX_PID_COLIBRI_IMX6
/* USB DFU */
#define CONFIG_CMD_DFU
#define CONFIG_DFU_FUNCTION
#define CONFIG_DFU_MMC
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_CMD_ASKENV
/* Command definition */
#include <config_cmd_default.h>
#undef CONFIG_CMD_IMLS
#undef CONFIG_BOOTDELAY
#define CONFIG_BOOTDELAY 1
#undef CONFIG_IPADDR
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#undef CONFIG_SERVERIP
#define CONFIG_SERVERIP 192.168.10.1
#define CONFIG_LOADADDR 0x80800000
#define CONFIG_SYS_TEXT_BASE 0x87800000
#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 /* Set to QSPI1 A flash at default */
#define CONFIG_CMD_BOOTAUX /* Boot M4 */
#define CONFIG_CMD_SETEXPR
#define SD_BOOTCMD \
"sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
"sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \
"${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
"load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \
"load mmc 0:1 ${fdt_addr_r} ${fdt_file} && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define NFS_BOOTCMD \
"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
"nfsboot=run setup; " \
"setenv bootargs ${defargs} ${nfsargs} " \
"${setupargs} ${vidargs}; echo Booting from NFS...;" \
"dhcp ${kernel_addr_r} && " \
"tftp ${fdt_addr_r} ${fdt_file} && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define UBI_BOOTCMD \
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
"ubiboot=run setup; " \
"setenv bootargs ${defargs} ${ubiargs} " \
"${setupargs} ${vidargs}; echo Booting from NAND...; " \
"ubi part ubi && ubifsmount ubi0:rootfs && " \
"ubifsload ${kernel_addr_r} /boot/${kernel_file} && " \
"ubifsload ${fdt_addr_r} /boot/${fdt_file} && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
#ifdef CONFIG_CMD_BOOTAUX
#define UPDATE_M4_ENV \
"m4image=m4_qspi.bin\0" \
"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
"update_m4_from_sd=" \
"if sf probe 0:0; then " \
"if run loadm4image; then " \
"setexpr fw_sz ${filesize} + 0xffff; " \
"setexpr fw_sz ${fw_sz} / 0x10000; " \
"setexpr fw_sz ${fw_sz} * 0x10000; " \
"sf erase 0x0 ${fw_sz}; " \
"sf write ${loadaddr} 0x0 ${filesize}; " \
"fi; " \
"fi\0" \
"m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
#else
#define UPDATE_M4_ENV ""
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#if 0
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
"fdt_addr=0x83000000\0" \
"fdt_high=0xffffffff\0" \
"console=ttymxc0\0" \
"bootargs=console=ttymxc0,115200 ubi.mtd=3 " \
"root=ubi0:rootfs rootfstype=ubifs " \
"mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),-(rootfs)\0"\
"bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\
"nand read ${fdt_addr} 0x5000000 0x100000;"\
"bootz ${loadaddr} - ${fdt_addr}\0"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
UPDATE_M4_ENV \
NFS_BOOTCMD \
SD_BOOTCMD \
UBI_BOOTCMD \
"console=ttymxc0\0" \
"defargs=\0" \
"fdt_addr=0x83000000\0" \
"fdt_addr_r=0x83000000\0" \
"fdt_file=imx7d-colibri.dtb\0" \
"fdt_fixup=;\0" \
"fdt_high=0xffffffff\0" \
"image=zImage\0" \
"initrd_high=0xffffffff\0" \
"ip_dyn=yes\0" \
"kernel_addr_r=80800000\0" \
"kernel_file=zImage\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
"flash_eth.img && source ${loadaddr}\0" \
"setsdupdate=mmc rescan && setenv interface mmc && " \
"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
",${baudrate}n8 ${memargs} consoleblank=0 ${mtdparts}\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
#if 0
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootz ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootz; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootz; " \
"fi;\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
"else " \
"setenv get_cmd tftp; " \
"fi; " \
"${get_cmd} ${image}; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
"bootz ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootz; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootz; " \
"fi;\0"
#if 0
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev};" \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loadimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else run netboot; fi"
#endif
#endif
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "Colibri iMX7 # "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 1024
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 256
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1c000000)
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
#define CONFIG_STACKSIZE SZ_128K
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_SIZE SZ_8K
#ifdef CONFIG_SYS_BOOT_QSPI
#define CONFIG_SYS_USE_QSPI
#define CONFIG_ENV_IS_IN_SPI_FLASH
#elif defined CONFIG_SYS_BOOT_NAND
#define CONFIG_SYS_USE_NAND
#define CONFIG_ENV_IS_IN_NAND
#else
#define CONFIG_ENV_IS_IN_MMC
#endif
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_CMD_NAND
#define CONFIG_CMD_WRITEBCB_MX7
#define CONFIG_BCH
#define CONFIG_CMD_NAND_TRIMFFS
/* NAND stuff */
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
/* UBI stuff */
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_CMD_UBI
#define CONFIG_MTD_UBI_FASTMAP
#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */
/* Dynamic MTD partition support */
#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define MTDIDS_DEFAULT "nand0=gpmi-nand"
#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:" \
"512k(mx7-bcb)," \
"3584k(u-boot)ro," \
"512k(u-boot-env)," \
"-(ubi)"
/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
#endif
#ifdef CONFIG_SYS_USE_QSPI
#define CONFIG_FSL_QSPI /* enable the QUADSPI driver */
#define CONFIG_QSPI_BASE QSPI1_IPS_BASE_ADDR
#define CONFIG_QSPI_MEMMAP_BASE QSPI0_ARB_BASE_ADDR
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_BAR
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_SPEED 40000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (8 * SZ_64K)
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET (768 * 1024)
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#elif defined(CONFIG_ENV_IS_IN_NAND)
#undef CONFIG_ENV_SIZE
#define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
#endif
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_SYS_FSL_USDHC_NUM 1
#else
#define CONFIG_SYS_FSL_USDHC_NUM 1
#endif
#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_BMODE
#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif
#define CONFIG_VIDEO
#ifdef CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
#endif
#define CONFIG_IMX_THERMAL
#if defined(CONFIG_MXC_EPDC) && defined(CONFIG_SYS_USE_QSPI)
#error "EPDC Pins conflicts QSPI, Either EPDC or QSPI can be enabled!"
#endif
#if defined(CONFIG_ANDROID_SUPPORT)
#error "not yet implemented, compare with mx7dsabresdandroid.h"
#include "colibri_imx7_android.h"
#endif
#endif /* __CONFIG_H */
|
