summaryrefslogtreecommitdiff
path: root/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
blob: 69bfc378e1270f9b8a1c83d60ccf9618197aa906 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
// SPDX-License-Identifier: GPL-2.0
/*
 * Common AM62A EVM dts file for SPLs
 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
 */

/ {
	chosen {
		stdout-path = "serial2:115200n8";
		tick-timer = &timer1;
	};

	memory@80000000 {
		u-boot,dm-spl;
	};
};

&cbass_main{
	u-boot,dm-spl;

	timer1: timer@2400000 {
		compatible = "ti,omap5430-timer";
		reg = <0x00 0x2400000 0x00 0x80>;
		ti,timer-alwon;
		clock-frequency = <25000000>;
		u-boot,dm-spl;
	};
};

&dmss {
	u-boot,dm-spl;
};

&secure_proxy_main {
	u-boot,dm-spl;
};

&dmsc {
	u-boot,dm-spl;
};

&k3_pds {
	u-boot,dm-spl;
};

&k3_clks {
	u-boot,dm-spl;
};

&k3_reset {
	u-boot,dm-spl;
};

&wkup_conf {
	u-boot,dm-spl;
};

&chipid {
	u-boot,dm-spl;
};

&main_pmx0 {
	u-boot,dm-spl;
};

&main_uart0 {
	u-boot,dm-spl;
};

&main_uart0_pins_default {
	u-boot,dm-spl;
};

&main_uart1 {
	u-boot,dm-spl;
};

&cbass_mcu {
	u-boot,dm-spl;
};

&cbass_wakeup {
	u-boot,dm-spl;
};

&mcu_pmx0 {
	u-boot,dm-spl;
};

&wkup_uart0 {
	u-boot,dm-spl;
};

&main_gpio0 {
	u-boot,dm-spl;
};

&main_i2c0 {
	u-boot,dm-spl;
};

&main_i2c0_pins_default {
	u-boot,dm-spl;
};

&main_i2c1 {
	u-boot,dm-spl;
};

&main_i2c1_pins_default {
	u-boot,dm-spl;
};

&exp1 {
	u-boot,dm-spl;
};

&sdhci0 {
	u-boot,dm-spl;
};

&sdhci1 {
	u-boot,dm-spl;
};

&main_mmc1_pins_default {
	u-boot,dm-spl;
};

&k3_reset {
	u-boot,dm-spl;
};

&dmsc {
	u-boot,dm-spl;
	k3_sysreset: sysreset-controller {
		compatible = "ti,sci-sysreset";
		u-boot,dm-spl;
	};
};

&vdd_mmc1 {
	u-boot,dm-spl;
};

&main_bcdma {
	reg = <0x00 0x485c0100 0x00 0x100>,
	      <0x00 0x4c000000 0x00 0x20000>,
	      <0x00 0x4a820000 0x00 0x20000>,
	      <0x00 0x4aa40000 0x00 0x20000>,
	      <0x00 0x4bc00000 0x00 0x100000>,
	      <0x00 0x48600000 0x00 0x8000>,
	      <0x00 0x484a4000 0x00 0x2000>,
	      <0x00 0x484c2000 0x00 0x2000>;
	reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
		    "ringrt", "cfg", "tchan", "rchan";
	u-boot,dm-spl;
};

&main_pktdma {
	reg = <0x00 0x485c0000 0x00 0x100>,
	      <0x00 0x4a800000 0x00 0x20000>,
	      <0x00 0x4aa00000 0x00 0x40000>,
	      <0x00 0x4b800000 0x00 0x400000>,
	      <0x00 0x485e0000 0x00 0x20000>,
	      <0x00 0x484a0000 0x00 0x4000>,
	      <0x00 0x484c0000 0x00 0x2000>,
	      <0x00 0x48430000 0x00 0x4000>;
	reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
		    "cfg", "tchan", "rchan", "rflow";
	u-boot,dm-spl;
};

&cpsw3g {
	reg = <0x00 0x08000000 0x00 0x200000>,
	      <0x00 0x43000200 0x00 0x8>;
	reg-names = "cpsw_nuss", "mac_efuse";
	/delete-property/ ranges;
	u-boot,dm-spl;

	cpsw-phy-sel@04044 {
		compatible = "ti,am64-phy-gmii-sel";
		reg = <0x00 0x00104044 0x00 0x8>;
		u-boot,dm-spl;
	};
};

&usbss0 {
	u-boot,dm-spl;
};

&usb0 {
	u-boot,dm-spl;
};