/*
 * Copyright (C) 2013 Boundary Devices
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
DATA 4, MX6_MMDC_P0_MDCFG0, 0x2c305323
DATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8D63
DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
DATA 4, MX6_MMDC_P0_MDOR, 0x00301023
DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
/* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */
DATA 4, MX6_MMDC_P0_MDASP, 0x00000017
/* DDR3 DATA BUS SIZE: 64BIT */
/* DATA 4, MX6_MMDC_P0_MDCTL, 0x821A0000 */
/* DDR3 DATA BUS SIZE: 32BIT */
DATA 4, MX6_MMDC_P0_MDCTL, 0x82190000

/* Write commands to DDR */
/* Load Mode Registers */
/* TODO Use Auto Self-Refresh mode (Extended Temperature)*/
/* DATA 4, MX6_MMDC_P0_MDSCR, 0x04408032 */
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
/* ZQ calibration */
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040

DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x420F020F
DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x01760175
DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x41640171
DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x015E0160
DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45464B4A
DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x49484A46
DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40402E32
DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3A3A3231
DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x003A003A
DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0030002F
DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x002F0038
DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00270039
DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006