From bc138ed0a86f0ca8f870c419955f07f3f21b7dfa Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Thu, 28 Nov 2019 15:56:20 +0200 Subject: mach-imx: bootaux: add dcache flushing before enabling M4 This patch fixes the issue with broken bootaux command, when M4 binary is loaded and data cache isn't flushed before M4 core is enabled. Reproducing: Signed-off-by: Igor Opaniuk Reviewed-by: Oleksandr Suvorov (submitted upstream https://patchwork.ozlabs.org/patch/1202073/) --- arch/arm/mach-imx/imx_bootaux.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 97c49536c8..425b12a421 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -27,6 +27,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) writel(stack, M4_BOOTROM_BASE_ADDR); writel(pc, M4_BOOTROM_BASE_ADDR + 4); + flush_dcache_all(); + /* Enable M4 */ #ifdef CONFIG_IMX8M call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0); -- cgit v1.2.3