From aa2643aaac6f68902266a4574cad78ab3c8d313b Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 5 Dec 2014 17:35:29 +0100 Subject: apalis imx6: add inital configuration for IT - Add a 2GB RAM configuration with quick and dirty DDR optimization values. - Make sure the device-tree is not relocated to high-memory. - Configure eMMC reset to GPIO with pullup. The boot ROM already did a pulse. --- board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg | 40 ++++++++++++--------- board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg | 48 +++++++++++++++++++++++++ board/toradex/apalis_imx6/apalis_imx6.c | 3 +- board/toradex/apalis_imx6/apalis_imx6q.cfg | 4 +++ boards.cfg | 1 + include/configs/apalis_imx6.h | 2 ++ 6 files changed, 79 insertions(+), 19 deletions(-) create mode 100644 board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg diff --git a/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg b/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg index 6c68146f92..88ef62ef3e 100644 --- a/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg +++ b/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg @@ -1,16 +1,17 @@ /* * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2014 Toradex AG * * SPDX-License-Identifier: GPL-2.0+ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 -DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974 -DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7954 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB328F64 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023 -DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09555050 DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 @@ -22,20 +23,25 @@ DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 -DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 -DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 -DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42720306 -DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026F0266 -DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4273030A -DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02740240 -DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E -DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x403A3747 -DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40434541 -DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B -DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E -DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B -DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00190015 -DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 + +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x432A0338 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03260324 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43340344 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x031E027C + +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x33272D2E +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x2F312B37 + +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A35433C +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4336453F + +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0009000E +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0018000B +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00060015 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E + DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 diff --git a/board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg b/board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg new file mode 100644 index 0000000000..bf8d4b36b1 --- /dev/null +++ b/board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2014 Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E78f5 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xff328f64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x02888032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19408030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 + +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x03300338 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03240324 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x03440350 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x032C0308 + +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x40363C3E +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x3C3E3C46 + +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x403E463E +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4A384C46 + +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0009000E +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0018000B +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00060015 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E + +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 5782eeeb0c..605d8de3a1 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -81,7 +81,6 @@ int dram_init(void) /* use the DDR controllers configured size */ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, (ulong)imx_ddr_size()); - return 0; } @@ -193,7 +192,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP), }; int mx6_rgmii_rework(struct phy_device *phydev) diff --git a/board/toradex/apalis_imx6/apalis_imx6q.cfg b/board/toradex/apalis_imx6/apalis_imx6q.cfg index b6f1518ea9..7ade42be6b 100644 --- a/board/toradex/apalis_imx6/apalis_imx6q.cfg +++ b/board/toradex/apalis_imx6/apalis_imx6q.cfg @@ -25,5 +25,9 @@ BOOT_FROM sd #include "asm/arch/crm_regs.h" #include "ddr-setup.cfg" +#if CONFIG_DDR_MB == 2048 +#include "1066mhz_4x256mx16.cfg" +#else #include "1066mhz_4x128mx16.cfg" +#endif #include "clocks.cfg" diff --git a/boards.cfg b/boards.cfg index d9c3090e6b..25217c8ebc 100644 --- a/boards.cfg +++ b/boards.cfg @@ -329,6 +329,7 @@ Active arm armv7 mx6 gateworks gw_ventana Active arm armv7 mx6 gateworks gw_ventana gwventanaq1gspi gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024,SPI_FLASH Tim Harvey Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton Active arm armv7 mx6 toradex apalis_imx6 apalis_imx6q1g apalis_imx6:IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=1024 Max Krummenacher +Active arm armv7 mx6 toradex apalis_imx6 apalis_imx6q2g apalis_imx6:IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=2048 Max Krummenacher Active arm armv7 mx6 toradex colibri_imx6 colibri_imx6dl512m colibri_imx6:IMX_CONFIG=board/toradex/colibri_imx6/colibri_imx6.cfg,MX6DL,DDR_MB=512 Max Krummenacher Active arm armv7 mx6 toradex colibri_imx6 colibri_imx6s256m colibri_imx6:IMX_CONFIG=board/toradex/colibri_imx6/colibri_imx6.cfg,MX6DL,DDR_MB=256 Max Krummenacher Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 92bf253231..06e8d5838e 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -191,6 +191,8 @@ #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x12000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x10800000\0" \ "ramdisk_addr_r=0x12100000\0" -- cgit v1.2.3