From 60843b36a6141e5324bd3c1526c5d58d472189db Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Thu, 6 Sep 2018 17:59:30 +0200 Subject: scfw: update to the 0.7 api files Signed-off-by: Max Krummenacher --- arch/arm/imx-common/sci/svc/misc/rpc.h | 1 + arch/arm/imx-common/sci/svc/misc/rpc_clnt.c | 39 +++++++++++++- arch/arm/imx-common/sci/svc/pm/rpc.h | 1 + arch/arm/imx-common/sci/svc/pm/rpc_clnt.c | 20 +++++++ arch/arm/imx-common/sci/svc/timer/rpc.h | 3 ++ arch/arm/imx-common/sci/svc/timer/rpc_clnt.c | 53 ++++++++++++++++++ arch/arm/include/asm/imx-common/sci/svc/irq/api.h | 62 ++++++++++++---------- arch/arm/include/asm/imx-common/sci/svc/misc/api.h | 14 ++++- arch/arm/include/asm/imx-common/sci/svc/pad/api.h | 5 +- arch/arm/include/asm/imx-common/sci/svc/pm/api.h | 39 ++++++++++++-- arch/arm/include/asm/imx-common/sci/svc/rm/api.h | 12 ++--- .../arm/include/asm/imx-common/sci/svc/timer/api.h | 56 +++++++++++++++++-- arch/arm/include/asm/imx-common/sci/types.h | 14 ++++- 13 files changed, 274 insertions(+), 45 deletions(-) diff --git a/arch/arm/imx-common/sci/svc/misc/rpc.h b/arch/arm/imx-common/sci/svc/misc/rpc.h index fee681d889..33c4c4253a 100644 --- a/arch/arm/imx-common/sci/svc/misc/rpc.h +++ b/arch/arm/imx-common/sci/svc/misc/rpc.h @@ -35,6 +35,7 @@ #define MISC_FUNC_SECO_FORWARD_LIFECYCLE 22U /*!< Index for misc_seco_forward_lifecycle() RPC call */ #define MISC_FUNC_SECO_RETURN_LIFECYCLE 23U /*!< Index for misc_seco_return_lifecycle() RPC call */ #define MISC_FUNC_SECO_BUILD_INFO 24U /*!< Index for misc_seco_build_info() RPC call */ +#define MISC_FUNC_SECO_CHIP_INFO 25U /*!< Index for misc_seco_chip_info() RPC call */ #define MISC_FUNC_DEBUG_OUT 10U /*!< Index for misc_debug_out() RPC call */ #define MISC_FUNC_WAVEFORM_CAPTURE 6U /*!< Index for misc_waveform_capture() RPC call */ #define MISC_FUNC_BUILD_INFO 15U /*!< Index for misc_build_info() RPC call */ diff --git a/arch/arm/imx-common/sci/svc/misc/rpc_clnt.c b/arch/arm/imx-common/sci/svc/misc/rpc_clnt.c index cb88d86530..9ef2287106 100644 --- a/arch/arm/imx-common/sci/svc/misc/rpc_clnt.c +++ b/arch/arm/imx-common/sci/svc/misc/rpc_clnt.c @@ -248,6 +248,43 @@ void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, return; } +sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, + uint16_t *monotonic, uint32_t *uid_l, uint32_t *uid_h) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; + RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SECO_CHIP_INFO; + RPC_SIZE(&msg) = 1U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + if (uid_l != NULL) + { + *uid_l = RPC_U32(&msg, 0U); + } + + if (uid_h != NULL) + { + *uid_h = RPC_U32(&msg, 4U); + } + + if (lc != NULL) + { + *lc = RPC_U16(&msg, 8U); + } + + if (monotonic != NULL) + { + *monotonic = RPC_U16(&msg, 10U); + } + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + void sc_misc_debug_out(sc_ipc_t ipc, uint8_t ch) { sc_rpc_msg_t msg; @@ -433,7 +470,7 @@ sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource, RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_MISC; RPC_FUNC(&msg) = (uint8_t) MISC_FUNC_SET_TEMP; RPC_U16(&msg, 0U) = (uint16_t) resource; - RPC_I16(&msg, 2U) = (uint16_t) celsius; + RPC_I16(&msg, 2U) = (int16_t) celsius; RPC_U8(&msg, 4U) = (uint8_t) temp; RPC_I8(&msg, 5U) = (int8_t) tenths; RPC_SIZE(&msg) = 3U; diff --git a/arch/arm/imx-common/sci/svc/pm/rpc.h b/arch/arm/imx-common/sci/svc/pm/rpc.h index 49046c2ca7..574a602f2a 100644 --- a/arch/arm/imx-common/sci/svc/pm/rpc.h +++ b/arch/arm/imx-common/sci/svc/pm/rpc.h @@ -28,6 +28,7 @@ #define PM_FUNC_SET_PARTITION_POWER_MODE 1U /*!< Index for pm_set_partition_power_mode() RPC call */ #define PM_FUNC_GET_SYS_POWER_MODE 2U /*!< Index for pm_get_sys_power_mode() RPC call */ #define PM_FUNC_SET_RESOURCE_POWER_MODE 3U /*!< Index for pm_set_resource_power_mode() RPC call */ +#define PM_FUNC_SET_RESOURCE_POWER_MODE_ALL 22U /*!< Index for pm_set_resource_power_mode_all() RPC call */ #define PM_FUNC_GET_RESOURCE_POWER_MODE 4U /*!< Index for pm_get_resource_power_mode() RPC call */ #define PM_FUNC_REQ_LOW_POWER_MODE 16U /*!< Index for pm_req_low_power_mode() RPC call */ #define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U /*!< Index for pm_req_cpu_low_power_mode() RPC call */ diff --git a/arch/arm/imx-common/sci/svc/pm/rpc_clnt.c b/arch/arm/imx-common/sci/svc/pm/rpc_clnt.c index b000a3ba7b..0c57823366 100644 --- a/arch/arm/imx-common/sci/svc/pm/rpc_clnt.c +++ b/arch/arm/imx-common/sci/svc/pm/rpc_clnt.c @@ -105,6 +105,26 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, return (sc_err_t) result; } +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, + sc_rm_pt_t pt, sc_pm_power_mode_t mode, sc_rsrc_t exclude) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_PM; + RPC_FUNC(&msg) = (uint8_t) PM_FUNC_SET_RESOURCE_POWER_MODE_ALL; + RPC_U16(&msg, 0U) = (uint16_t) exclude; + RPC_U8(&msg, 2U) = (uint8_t) pt; + RPC_U8(&msg, 3U) = (uint8_t) mode; + RPC_SIZE(&msg) = 2U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t *mode) { diff --git a/arch/arm/imx-common/sci/svc/timer/rpc.h b/arch/arm/imx-common/sci/svc/timer/rpc.h index 0c498e97f0..43e4bd472e 100644 --- a/arch/arm/imx-common/sci/svc/timer/rpc.h +++ b/arch/arm/imx-common/sci/svc/timer/rpc.h @@ -39,6 +39,9 @@ #define TIMER_FUNC_SET_RTC_PERIODIC_ALARM 14U /*!< Index for timer_set_rtc_periodic_alarm() RPC call */ #define TIMER_FUNC_CANCEL_RTC_ALARM 15U /*!< Index for timer_cancel_rtc_alarm() RPC call */ #define TIMER_FUNC_SET_RTC_CALB 11U /*!< Index for timer_set_rtc_calb() RPC call */ +#define TIMER_FUNC_SET_SYSCTR_ALARM 16U /*!< Index for timer_set_sysctr_alarm() RPC call */ +#define TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM 17U /*!< Index for timer_set_sysctr_periodic_alarm() RPC call */ +#define TIMER_FUNC_CANCEL_SYSCTR_ALARM 18U /*!< Index for timer_cancel_sysctr_alarm() RPC call */ /*@}*/ /* Types */ diff --git a/arch/arm/imx-common/sci/svc/timer/rpc_clnt.c b/arch/arm/imx-common/sci/svc/timer/rpc_clnt.c index 4815095587..2536330829 100644 --- a/arch/arm/imx-common/sci/svc/timer/rpc_clnt.c +++ b/arch/arm/imx-common/sci/svc/timer/rpc_clnt.c @@ -361,5 +361,58 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count) return (sc_err_t) result; } +sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; + RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_SYSCTR_ALARM; + RPC_U32(&msg, 0U) = (uint32_t) (ticks >> 32U); + RPC_U32(&msg, 4U) = (uint32_t) ticks; + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, + uint64_t ticks) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; + RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM; + RPC_U32(&msg, 0U) = (uint32_t) (ticks >> 32U); + RPC_U32(&msg, 4U) = (uint32_t) ticks; + RPC_SIZE(&msg) = 3U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + +sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc) +{ + sc_rpc_msg_t msg; + uint8_t result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (uint8_t) SC_RPC_SVC_TIMER; + RPC_FUNC(&msg) = (uint8_t) TIMER_FUNC_CANCEL_SYSCTR_ALARM; + RPC_SIZE(&msg) = 1U; + + sc_call_rpc(ipc, &msg, SC_FALSE); + + result = RPC_R8(&msg); + return (sc_err_t) result; +} + /**@}*/ diff --git a/arch/arm/include/asm/imx-common/sci/svc/irq/api.h b/arch/arm/include/asm/imx-common/sci/svc/irq/api.h index 49ecb3e5b9..391836db15 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/irq/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/irq/api.h @@ -25,7 +25,7 @@ /* Defines */ -#define SC_IRQ_NUM_GROUP 4 /*!< Number of groups */ +#define SC_IRQ_NUM_GROUP 5U /*!< Number of groups */ /*! * @name Defines for sc_irq_group_t @@ -35,56 +35,64 @@ #define SC_IRQ_GROUP_WDOG 1U /*!< Watchdog interrupts */ #define SC_IRQ_GROUP_RTC 2U /*!< RTC interrupts */ #define SC_IRQ_GROUP_WAKE 3U /*!< Wakeup interrupts */ +#define SC_IRQ_GROUP_SYSCTR 4U /*!< System counter interrupts */ /*@}*/ /*! * @name Defines for sc_irq_temp_t */ /*@{*/ -#define SC_IRQ_TEMP_HIGH (1U << 0) /*!< Temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU0_HIGH (1U << 1) /*!< CPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU1_HIGH (1U << 2) /*!< CPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU0_HIGH (1U << 3) /*!< GPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU1_HIGH (1U << 4) /*!< GPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC0_HIGH (1U << 5) /*!< DRC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC1_HIGH (1U << 6) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_VPU_HIGH (1U << 7) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC0_HIGH (1U << 8) /*!< PMIC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC1_HIGH (1U << 9) /*!< PMIC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_LOW (1U << 10) /*!< Temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU0_LOW (1U << 11) /*!< CPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU1_LOW (1U << 12) /*!< CPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU0_LOW (1U << 13) /*!< GPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU1_LOW (1U << 14) /*!< GPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC0_LOW (1U << 15) /*!< DRC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC1_LOW (1U << 16) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_VPU_LOW (1U << 17) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC0_LOW (1U << 18) /*!< PMIC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC1_LOW (1U << 19) /*!< PMIC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC2_HIGH (1U << 20) /*!< PMIC2 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC2_LOW (1U << 21) /*!< PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_HIGH (1U << 0U) /*!< Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_HIGH (1U << 1U) /*!< CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_HIGH (1U << 2U) /*!< CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_HIGH (1U << 3U) /*!< GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_HIGH (1U << 4U) /*!< GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_HIGH (1U << 5U) /*!< DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_HIGH (1U << 6U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_HIGH (1U << 7U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_HIGH (1U << 8U) /*!< PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_HIGH (1U << 9U) /*!< PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_LOW (1U << 10U) /*!< Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_LOW (1U << 11U) /*!< CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_LOW (1U << 12U) /*!< CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_LOW (1U << 13U) /*!< GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_LOW (1U << 14U) /*!< GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_LOW (1U << 15U) /*!< DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_LOW (1U << 16U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_LOW (1U << 17U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_LOW (1U << 18U) /*!< PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_LOW (1U << 19U) /*!< PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_HIGH (1U << 20U) /*!< PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_LOW (1U << 21U) /*!< PMIC2 temp alarm interrupt */ /*@}*/ /*! * @name Defines for sc_irq_wdog_t */ /*@{*/ -#define SC_IRQ_WDOG (1U << 0) /*!< Watchdog interrupt */ +#define SC_IRQ_WDOG (1U << 0U) /*!< Watchdog interrupt */ /*@}*/ /*! * @name Defines for sc_irq_rtc_t */ /*@{*/ -#define SC_IRQ_RTC (1U << 0) /*!< RTC interrupt */ +#define SC_IRQ_RTC (1U << 0U) /*!< RTC interrupt */ /*@}*/ /*! * @name Defines for sc_irq_wake_t */ /*@{*/ -#define SC_IRQ_BUTTON (1U << 0) /*!< Button interrupt */ -#define SC_IRQ_PAD (1U << 1) /*!< Pad wakeup */ +#define SC_IRQ_BUTTON (1U << 0U) /*!< Button interrupt */ +#define SC_IRQ_PAD (1U << 1U) /*!< Pad wakeup */ +/*@}*/ + +/*! + * @name Defines for sc_irq_sysctr_t + */ +/*@{*/ +#define SC_IRQ_SYSCTR (1U << 0U) /*!< SYSCTR interrupt */ /*@}*/ /* Types */ diff --git a/arch/arm/include/asm/imx-common/sci/svc/misc/api.h b/arch/arm/include/asm/imx-common/sci/svc/misc/api.h index 2782e4abaa..b856dca29a 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/misc/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/misc/api.h @@ -30,7 +30,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_MISC_DMA_GRP_W 5 /*!< Width of sc_misc_dma_group_t */ +#define SC_MISC_DMA_GRP_W 5U /*!< Width of sc_misc_dma_group_t */ /*@}*/ /*! Max DMA channel priority group */ @@ -321,6 +321,18 @@ sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr); void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit); +/*! + * This function is used to return SECO chip info. + * + * @param[in] ipc IPC handle + * @param[out] lc pointer to return lifecycle + * @param[out] monotonic pointer to return monotonic counter + * @param[out] uid_l pointer to return UID (lower 32 bits) + * @param[out] uid_h pointer to return UID (upper 32 bits) + */ +sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc, + uint16_t *monotonic, uint32_t *uid_l, uint32_t *uid_h); + /* @} */ /*! diff --git a/arch/arm/include/asm/imx-common/sci/svc/pad/api.h b/arch/arm/include/asm/imx-common/sci/svc/pad/api.h index 99b71c0e4b..4ded07f7f3 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/pad/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/pad/api.h @@ -50,6 +50,9 @@ * * Note muxing two input pads to the same IP functional signal will * result in undefined behavior. + * + * @includedoc pad/details.dox + * * @{ */ @@ -67,7 +70,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PAD_MUX_W 3 /*!< Width of mux parameter */ +#define SC_PAD_MUX_W 3U /*!< Width of mux parameter */ /*@}*/ /*! diff --git a/arch/arm/include/asm/imx-common/sci/svc/pm/api.h b/arch/arm/include/asm/imx-common/sci/svc/pm/api.h index fc68f86944..0d782ef0c2 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/pm/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/pm/api.h @@ -14,6 +14,8 @@ * * Module for the Power Management (PM) service. * + * @includedoc pm/details.dox + * * @{ */ @@ -31,10 +33,10 @@ * @name Defines for type widths */ /*@{*/ -#define SC_PM_POWER_MODE_W 2 /*!< Width of sc_pm_power_mode_t */ -#define SC_PM_CLOCK_MODE_W 3 /*!< Width of sc_pm_clock_mode_t */ -#define SC_PM_RESET_TYPE_W 2 /*!< Width of sc_pm_reset_type_t */ -#define SC_PM_RESET_REASON_W 3 /*!< Width of sc_pm_reset_reason_t */ +#define SC_PM_POWER_MODE_W 2U /*!< Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3U /*!< Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 2U /*!< Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 3U /*!< Width of sc_pm_reset_reason_t */ /*@}*/ /*! @@ -286,6 +288,9 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, * - SC_ERR_NOACCESS if caller's partition is not the resource owner * or parent of the owner * + * Resources must be at SC_PM_PW_MODE_LP mode or higher to access them, + * otherwise the master will get a bus error or hang. + * * This function will record the individual resource power mode * and change it if the requested mode is lower than or equal to the * partition power mode set with sc_pm_set_partition_power_mode(). @@ -307,6 +312,32 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt, sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode); +/*! +* This function sets the power mode for all the resources owned +* by a child partition. +* +* @param[in] ipc IPC handle +* @param[in] pt handle of child partition +* @param[in] mode power mode to apply +* @param[in] exclude resource to exclude +* +* @return Returns an error code (SC_ERR_NONE = success). +* +* Return errors: +* - SC_ERR_PARM if invalid partition or mode, +* - SC_ERR_NOACCESS if caller's partition is not the parent +* of \a pt +* +* This functions loops through all the resources owned by \a pt +* and sets the power mode to \a mode. It will skip setting +* \a exclude (SC_R_LAST to skip none). +* +* This function can only be called by the parent. It is used to +* implement some aspects of virtualization. +*/ +sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc, + sc_rm_pt_t pt, sc_pm_power_mode_t mode, sc_rsrc_t exclude); + /*! * This function gets the power mode of a resource. * diff --git a/arch/arm/include/asm/imx-common/sci/svc/rm/api.h b/arch/arm/include/asm/imx-common/sci/svc/rm/api.h index 4d4be8a23b..25ca3e655d 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/rm/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/rm/api.h @@ -32,12 +32,12 @@ * @name Defines for type widths */ /*@{*/ -#define SC_RM_PARTITION_W 5 /*!< Width of sc_rm_pt_t */ -#define SC_RM_MEMREG_W 6 /*!< Width of sc_rm_mr_t */ -#define SC_RM_DID_W 4 /*!< Width of sc_rm_did_t */ -#define SC_RM_SID_W 6 /*!< Width of sc_rm_sid_t */ -#define SC_RM_SPA_W 2 /*!< Width of sc_rm_spa_t */ -#define SC_RM_PERM_W 3 /*!< Width of sc_rm_perm_t */ +#define SC_RM_PARTITION_W 5U /*!< Width of sc_rm_pt_t */ +#define SC_RM_MEMREG_W 6U /*!< Width of sc_rm_mr_t */ +#define SC_RM_DID_W 4U /*!< Width of sc_rm_did_t */ +#define SC_RM_SID_W 6U /*!< Width of sc_rm_sid_t */ +#define SC_RM_SPA_W 2U /*!< Width of sc_rm_spa_t */ +#define SC_RM_PERM_W 3U /*!< Width of sc_rm_perm_t */ /*@}*/ /*! diff --git a/arch/arm/include/asm/imx-common/sci/svc/timer/api.h b/arch/arm/include/asm/imx-common/sci/svc/timer/api.h index 5108e157c3..b87740011f 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/timer/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/timer/api.h @@ -32,7 +32,7 @@ * @name Defines for type widths */ /*@{*/ -#define SC_TIMER_ACTION_W 3 /*!< Width of sc_timer_wdog_action_t */ +#define SC_TIMER_ACTION_W 3U /*!< Width of sc_timer_wdog_action_t */ /*@}*/ /*! @@ -257,7 +257,7 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, uint8_t day, uint8_t hour, uint8_t min, uint8_t sec); /*! - * This function sets the RTC alarm. + * This function sets the RTC alarm (periodic mode). * * @param[in] ipc IPC handle * @param[in] sec period in seconds @@ -270,7 +270,7 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon, sc_err_t sc_timer_set_rtc_periodic_alarm(sc_ipc_t ipc, uint32_t sec); /*! - * This function sets the RTC alarm. + * This function cancels the RTC alarm. * * @param[in] ipc IPC handle * @@ -300,6 +300,56 @@ sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count); /* @} */ +/*! + * @name System Counter (SYSCTR) Functions + * @{ + */ + +/*! + * This function sets the SYSCTR alarm. + * + * @param[in] ipc IPC handle + * @param[in] ticks number of 8MHz cycles + * + * Note this alarm setting clears when the alarm is triggered. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks); + +/*! + * This function sets the SYSCTR alarm (periodic mode). + * + * @param[in] ipc IPC handle + * @param[in] ticks number of 8MHz cycles + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, + uint64_t ticks); + +/*! + * This function cancels the SYSCTR alarm. + * + * @param[in] ipc IPC handle + * + * Note this alarm setting clears when the alarm is triggered. + * + * @return Returns an error code (SC_ERR_NONE = success). + * + * Return errors: + * - SC_ERR_PARM if invalid time/date parameters + */ +sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc); + +/* @} */ + #endif /* SC_TIMER_API_H */ /**@}*/ diff --git a/arch/arm/include/asm/imx-common/sci/types.h b/arch/arm/include/asm/imx-common/sci/types.h index 86d4fb73ec..635f01d057 100644 --- a/arch/arm/include/asm/imx-common/sci/types.h +++ b/arch/arm/include/asm/imx-common/sci/types.h @@ -71,7 +71,7 @@ #define SC_850MHZ 850000000U /*!< 850MHz */ #define SC_900MHZ 900000000U /*!< 900MHz */ #define SC_1000MHZ 1000000000U /*!< 1GHz */ -#define SC_1056MHZ 1056000000U /*!< 1.056GHz */ +#define SC_1060MHZ 1060000000U /*!< 1.06GHz */ #define SC_1188MHZ 1188000000U /*!< 1.188GHz */ #define SC_1260MHZ 1260000000U /*!< 1.26GHz */ #define SC_1280MHZ 1280000000U /*!< 1.28GHz */ @@ -112,6 +112,7 @@ #define SC_864MHZ 864000000U /*!< 864MHz */ #define SC_960MHZ 960000000U /*!< 960MHz */ #define SC_1056MHZ 1056000000U /*!< 1056MHz */ +#define SC_1104MHZ 1104000000U /*!< 1104MHz */ #define SC_1200MHZ 1200000000U /*!< 1.2GHz */ #define SC_1464MHZ 1464000000U /*!< 1.464GHz */ #define SC_2400MHZ 2400000000U /*!< 2.4GHz */ @@ -763,7 +764,16 @@ #define SC_C_RST0 43U #define SC_C_RST1 44U #define SC_C_SEL0 45U -#define SC_C_LAST 46U +#define SC_C_CALIB0 46U +#define SC_C_CALIB1 47U +#define SC_C_CALIB2 48U +#define SC_C_IPG_DEBUG 49U +#define SC_C_IPG_DOZE 50U +#define SC_C_IPG_WAIT 51U +#define SC_C_IPG_STOP 52U +#define SC_C_IPG_STOP_MODE 53U +#define SC_C_IPG_STOP_ACK 54U +#define SC_C_LAST 55U #define SC_P_ALL ((sc_pad_t) UINT16_MAX) /*!< All pads */ -- cgit v1.2.3