From 4f61e20bf889d610327114779f58b57f8273d18b Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Thu, 12 Nov 2015 18:24:24 +0100 Subject: colibri_imx7.c: sort PAD_MUX values --- board/toradex/colibri_imx7/colibri_imx7.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 5a3a182721..6449268808 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -45,15 +45,10 @@ DECLARE_GLOBAL_DATA_PTR; -#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ - PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ - PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_PU5KOHM | PAD_CTL_DSE_3P3V_98OHM) #define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) #define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) - #define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ @@ -62,16 +57,28 @@ DECLARE_GLOBAL_DATA_PTR; #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ PAD_CTL_DSE_3P3V_49OHM) +#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) + +#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) + #define QSPI_PAD_CTRL \ (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) #define SPI_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) -#define BUTTON_PAD_CTRL (PAD_CTL_PUS_PU5KOHM | PAD_CTL_DSE_3P3V_98OHM) +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) -#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) +#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) -#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) +#define NO_PULLUP (PAD_CTL_HYS | PAD_CTL_SRE_SLOW | PAD_CTL_DSE_3P3V_49OHM) + +#define WEAK_PULLUP (PAD_CTL_PUS_PU47KOHM | PAD_CTL_PUE | \ + | PAD_CTL_HYS | PAD_CTL_SRE_SLOW | PAD_CTL_DSE_3P3V_49OHM) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_PU47KOHM | PAD_CTL_PUE | \ + | PAD_CTL_HYS | PAD_CTL_SRE_SLOW | PAD_CTL_DSE_3P3V_49OHM) #define EPDC_PAD_CTRL 0x0 -- cgit v1.2.3