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Note that this requires the SCFW in a version which provides access
to the PMIC I2C. Something which the regular SCFW should not do.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Initial board support for Colibri iMX8QXP using a copy of Apalis iMX8.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add support for interactive recovery of Apalis iMX8 QuadMax
config block.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 70cf26d9f5edcb6de6b2b70f1bf6a821e46be3dd)
(cherry picked from commit afc3024a826e61dc0ecc5d55b8dea96544ca9487)
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Add an optional -y parameter to 'cfgblock create’ to simplify
automation.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit d909b68d7f9da189a16e3ead0a6454b715201e23)
(cherry picked from commit ace5cf96413d3c736148dcecd1481e4249b7c5f1)
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If the module is in serial downloader mode, we do no longer read the
environment from eMMC. Therefor, the eMMC is unitialized when trying
to read the config block. Use mmc_init to initialize the selected
MMC device before using it.
Note: In case the MMC has already been initialized, the mmc_init
detects that and returns immediately.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Conflicts:
board/toradex/common/configblock.c
(cherry picked from commit 0520b532d77d238be8015d3041a95188e47945cc)
(cherry picked from commit 3cb5f6450c39678a6361620bd45c423a503895cd)
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Add Toradex config block support for i.MX8QM.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 18426b50681e6cd64ab5977f0ba84efd3f7c4495)
(cherry picked from commit c6d0e1042170d273a5b5434abe867213155d5582)
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Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
(cherry picked from commit c97ae21d2e87f673e7f249f30df154b2bf5472fa)
(cherry picked from commit e82aab70ddcc0ea46e342980648fd23e69396b94)
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
(cherry picked from commit 3f5807fa41c1744f6d4a9f0b702fb01a31fd73a7)
(cherry picked from commit 77471afdd9b663b775a2d2a1acc383767268e343)
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Remove GPIOs used on the validation board but not required on
Apalis iMX8.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 9a8a826591c490c0a11c4baeef31c73f482c0438)
(cherry picked from commit adf5a30588c4352fc78c59b0d0c04fd43c6dad25)
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NXP LPUART1 is used as Apalis UART1, which is the main console
on our Linux BSP.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 360629c1fd6187de19d0f50feb85c725995e49cc)
(cherry picked from commit 63030dac6afc51d17b04d23ce41af4788f03717e)
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Make sure that all pins connected to the Micrel KSZ9031 PHY
are muxed. Properly reset the PHY after all muxing has been
applied. This makes sure that strapping is not overwritten by
the SoC default mux (particularly it makes sure that CLK125_NDO
is not driven low during reset).
Make sure to not use CONFIG_DM_ETH as it seems to break ETH
support as is.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit f0a1ceb6f5e2ab3b3618190541b1e7a9fd4c1e4a)
(cherry picked from commit 8f6405070189a8744c2f6a9d9a6e041554fb9046)
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The Apalis iMX8 module does not have PCA9557 GPIO controllers
on the module.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit c80b3bfbe693d5a8851129f4878d0cd3a7325d13)
(cherry picked from commit 898ae105703cd0019a542bc0a17649339c934fa6)
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Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit fa3d4f980a515b135778a74ce1b7476f61ef20d0)
(cherry picked from commit 2ee92bc1dd56b44343079a5474d0fc4e79f28f4a)
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Initial board support for Apalis iMX8 using a copy of NXP
iMX8QM ARM2 LPDDR4 board.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 68e401998ba0654292b7914b85433d8453202ec8)
(cherry picked from commit 6b9234fa1f5889f0eeecc6147afffbc859933c99)
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enhance memory controller performance and QoS setting
Signed-off-by: Tom.zheng <haidong.zheng@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Jian Li <jian.li@nxp.com>
(cherry picked from commit ae7b37d3ed72bad542c8e77db4bbc0325180d6d2)
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Now fsl_esdhc driver require the index of USDHCx_CLK_ROOT should be
defined sequentially. otherwise driver may get the wrong usdhc root
clock.
e.g. for imx8mm, usdhc3, driver actually get the rate of I2C1_CLK_ROOT
This patch add MXC_XXX_CLK, map to the real defined clock index.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 5cddab6e02e99a748f66e32880906aa427dc8e60)
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Enable TZASC on i.MX 8mm.
There is a need on 8MM to enable
the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit d72b8baecd8495cfba990b999fe390937859ad75)
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Pull down the DSI_EN gpio to disable mipi dsi panel before booting kernel.
This avoids display full yellow screen before kernel mipi driver probes
the device.
For MIPI2HDMI card, this DSI_EN gpio is not used. So nothing impact to it.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit e73adc9a139f2e8bb92bda1631fa2f2391a8a5e3)
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dispmix & mipi phy power domain must be enabled before doing any
config for lcfif and dsi.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Refact the lpddr4 init flow on i.MX8MM EVK board. board level only need
to provide the necessary dram init related parameter.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Add board level codes for enabling splash screen on imx8mm EVK. We
support two different display connecting to MIPI DSI miniSAS interfaces:
1. MIPI2HDMI daughter card (default)
2. RM67191 OLED panel
Users can set "panel" env vairable to "MIPI2HDMI" or "RM67191_OLED" to
switch them after reboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Setup the mipi_dsi_northwest driver and register a the HX8363 panel
device to mipi dsi bridge in board codes.
Signed-off-by: Ye Li <ye.li@nxp.com>
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with tzasc enabled, the GPU is generating AXI bus errors.
currently reverting the patch while debuging
This reverts commit 225f888b0960f817fc96842e35f48c7e2d4213d3.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
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Change to use clock API "clock_set_target_val" to set DRAM APB clock
root for DDR4 init.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Some debug codes in DDR init are used, which set NOC and NOC APB clocks to 25M
OSC and causes slow booting and poor performance in SPL and u-boot. Change to
original codes which only set DRAM APB clock to 200Mhz and use clock API to
implement it.
Some trailing spaces are also trimmed in this patch.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Fix build warnings in u-boot.
Change-Id: I1944657d2d89a03c0d2303a22a09538dfaa5fd2c
Signed-off-by: Luo Ji <ji.luo@nxp.com>
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i2c_setup calls force_idle_bus which calls
get_timer if SDA and SCL are not high. On the Pico
baseboard there are level shifters that pull SDA
and SCL high, but the test harness does not have
pull-ups on these lines. Because
board_early_init_f is called before timer_init the
call to get_timer was causing a divide-by-zero
error due to CNTFRQ not being initialized. Moving
the i2c_setup calls to board_init fixes this
issue. power_init_board (which uses I2C to
configure the PMIC) is called after board_init, so
this should be safe.
Bug:
Test: PMIC registers are read correctly on both
boards (DEV_ID=0x30 REV_ID=0x11)
Test: iMX7D SOM boots on Pico baseboard
Test: iMX7D SOM boots on test harness
Change-Id: Iecdd28f3177fe915a3b614565d8dfa6e20e6a842
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Change-Id: Ic0839045e3c13e6577a8f3e449c69f4f30f958b2
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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Enable the SPL SDP for iMX8MM EVK. So that when booting from USB serial
download mode, the SPL will enter SDP to download FIT image from USB host
(uuu tool) and boot into FIT image.
The SDP driver needs larger malloc pool size, so extend the SPL malloc pool
to 12KB and reduce the SPL BSS MAX to 4KB because BSS actual size is about 1KB.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit deb9c2bbebc4958ff35157159f68272ce1746143)
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Add SPL/u-boot board codes and DDR4 settings for iMX8MM DDR4 validation board.
DDR overnight stress test is passed.
Supported modules:
SD/eMMC, I2C, ENET, Flexspi, UART and USB.
Build config:
imx8mm_ddr4_val_defconfig
Signed-off-by: Ye Li <ye.li@nxp.com>
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Enable TZASC functionality.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Acked-by : Jacky Bai <ping.bai@nxp.com>
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We are targeting let uboot loading images from emmc to boot android.
Currently only emmc1 is enabled, so other devices are disabled.
Also change memory layout according to VM layout. The memory layout
needs to be samesize as what you configured in as "memory = "3584"".
Add a new dts dedicated for this kind uboot, add a new defconfig
to select CONFIG_XEN/CONFIG_XEN_DEBUG_SERIAL, deselect CONFIG_DM_SERIAL,
select CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK, and disable some devices
compared with imx8qm_mek_androidauto_defconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add the board_ehci_usb_phy_mode in board codes to overwrite the default
in ehci-mx6 driver. Since the DRP is enabled in tcpc, we use the feature
in board_ehci_usb_phy_mode to detect current role. Then driver can
assign correct role type to board_usb_init and board_usb_cleanup.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Enable the DRP, so the tcpc can try to toggle the role. This helps to
determine the current role when we don't know whether device or host is
connected.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Since the PD switch callback is added to tcpc driver, we move the
NX20P3483 settings to this callback to exit DB and set OVP.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Introduce a callback function to setup external PD switch. When PD
process is enabled, we call this function only when SINK_VBUS is enabled
to avoid system power shut down.
When PD process is disabled, since the tcpc and external PD switch may
still in dead battery mode, set them to exit dead battery.
This patch is used to fix two issues on iMX8MM EVK:
1. When power on the board, by default the PTN5110 and NX20P3483 will
enter dead battery mode. But for some cases, like timing issue for PTN5110
and NX20P3483 (refer rework instructions CQ6), and when dual port are plugin
power sources. There are possibility the PTN5110 does not enter dead battery mode,
but NX20P3483 is in dead battery. So for the USB2 primary power port, we has to check
SINK_VBUS before NX20P3483 exits dead battery, otherwise the system power will shut down
2. For the USB1 port, when dual port are plugin power sources. We need to set both
PTN5110 and NX20P3483 exit dead battery. Otherwise this port can't work for normal
host/device mode.
Signed-off-by: Ye Li <ye.li@nxp.com>
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There is already a PERF_TEST_2 macro controlling the performance
settings.
Also the removed settings in this patch is directly copied
from i.MX8MQ which is not that correct in some settings,
so remove them.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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When booting from USB (mfgtool), SPL restores the ROM context to
jump back to ROM to continue serial download.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Current u-boot reset is internal wdog reset. Change it to enable WDOG_B
to reset PMIC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
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like for i.MX 8mq ATF passes as argument to u-boot
the start and the length of the BL32 firmware.
u-boot uses this information to adjust the size of the DDR for linux.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
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Since default values of some registers of pmic not match well our board
design, add BD71837/BD71840 pmic support in spl, for example, RESET key
(PWRON_B) pushing time, VDD_DRAM too low for 3Ghz DDR.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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MX7ULP needs to have the QSPI interrupt configured as a wakeup source
in the SIM_WKPU_WAKEUP_ENABLE register, otherwise the QSPI interrupts
do not wakeup the CPU from idle mode leading to poor performance in
Linux.
The SIM_WKPU_WAKEUP_ENABLE register only exists in B0 silicon, so
make sure to only write to this register in the B0 version (or greater).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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Add imx8m mini evk board related config and header in uboot.
Change-Id: I23d830532fc3d7d47c4284b2214e0d1e11e4ae0b
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
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Enable the USB host and device support, add relvent board level codes
and settings.
For device mode, the gadget is fixed on USB device 0. Can't support
gadget on USB device 1.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
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On iMX8MM EVK, the USB2 port is the primary power supply, when USB2 is charging,
the 3483_EN_SNK1 is not enabled. In the board, we init the tcpc of USB2 first with
PD enabled. If it is charging, when init the tcpc of USB1 we disable the PD,
otherwise we enable PD on USB1.
The USB PD switch NX20P3438 needs to exit dead battery mode before
enable EN_SINK, otherwise the OVP is fixed at 6.8V. Also the OVP threshold needs set to
23V, when we switch to use 20V VBUS input.
Due to HW issue, after we switched to 9V/20V, set on/off button to off then set back it to
on, the board can't power up. In this patch we limit the voltage to 5V, will change back
to 9V/20V when HW fixes the issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
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On iMX8MM EVK, there are two USB ports. Both can support USB PD, but
with USB2 has HW priority.
So we Change tcpc_pd_sink_check_charging to public function and
use it to know whether the USB tcpc is power charging.
Additional, add disable_pd to init config. So we can disable PD session
for uncharged or lower priority port.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The CD pin on SD2 socket is not connected by hardware, because this pin
is used as ALERT pin of PTN5110. So we have to use DAT3 for CD detection.
Since the USDHC driver does not support using DAT3 for CD, we have set this
port to non-removable in DTS. In SPL, we switch the pad setting of DAT3 for
CD detecting.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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