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2017-10-10MLK-16562 imx8qxp: Fix MAC fuse address for QXPYe Li
Since i.MX8QXP only use one 16K fuse array, it has different fuse address for 2nd half 256 fuse words with QM. According to its fuse map, the fuse addresses for MAC1 and MAC2 are 708-711. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-10-09MLK-16560-4: imx8: Remove hardcoded sids for sdhc/fecLeonard Crestez
This is better done through dts. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-10-09MLK-16560-3: imx8: config_smmu_fdt: Support mmu-masters bindingLeonard Crestez
This is deprecated in favor of the generic iommus binding but xen only supports this older version. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-10-09MLK-16560-2: imx8: Use fsl,sc_rsrc_id binding to map device to rsrcLeonard Crestez
Using the SMMU for some devices (like dpu) requires a streamid to be assigned to multiple resources. Determining the resource ids for a device is a problem that occurs in multiple contexts. So far uboot deals with this by parsing the power-domain node which is insufficient here. Add a new devicetree property called fsl,sc_rsrc_id which lists the resource ids associated by a certain device. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-10-09MLK-16560-1: imx8: Configure sids based on iommu properties in dtbLeonard Crestez
Use streamids specified in dtb because they need to match anyway. This removes the need to rebuild uboot for stream id assignments. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-09-26MLK-16535 net: fec: Fix issue in DM probe functionYe Li
Met a problem that mii command fails to work after u-boot booting up. The root cause is the fec_probe function initializes ethernet PHY first, then reset the FEC controller. This causes the mii_speed register reset to 0 and lead mdio can't work. Change the flow to reset FEC controller prior than setup PHY. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-09-21MLK-16503 imx8qm_mek: Add support for QM MEK boardYe Li
Add build config, dts and board codes for i.MX8QM MEK board. Supported peripherals: UART, eMMC/SD, ENET, I2C, USB TYPEC DFP mode, flexspi. DTS is ported from kernel commit a4fff857ea5f0a6513b943e0b0b842d5008785f1, and enable more peripherals. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-21MLK-16499-2 mmc: fsl_esdhc: Remove duplicated clock settingsYe Li
In esdhc_set_ios, the clock has been setup before calling esdhc_set_timing. So no need to call set_sysctl more. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-21MLK-16499-1 mmc: Add support for HS400Ye Li
The HS400 ES (Enhanced Strobe) has been added. This patch addes support for HS400 for eMMC 5.0 devices. It needs tuning at HS200 to synchronize command response. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-20MLK-16496-2 mmc: fsl_esdhc: add hs400 es mode supportPeng Fan
Add HS400 ES mode support. The flow is same as mmc_select_hs400es in kernel drivers/mmc/core/mmc.c. With HS400 ES, there is no tuning needed. With Toshiba 32GB Automotive eMMC5.1 on 8QXP ARM2 board, speed test: 'time mmc read 0x90000000 0 0x200000' shows that speed is 282MB/s. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2017-09-20MLK-16496-1 imx8qm/qxp: set usdhc clock to 400MPeng Fan
Set usdhc clock to 400M. When enabling HS400 ES, DDR EN is enabled, if we still have input clock as 200M, the real output clock will be 100M. So set clock to 400M to get real 200M output when enabling HS400/ES. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2017-09-14MLK-16431-3 imx8qxp_mek: Enable the USB3.0 XHCI driverYe Li
Enable the USB3.0 XHCI driver to support host mode on MEK board. The USB3.0 typec on MEK board uses PTN5110 TCPC as cc logic and power control. Different like the device on ARM2 board, this IC needs driver to control and get status through I2C bus. In this patch, we simply call the TCPC API to set to DFP mode, check the CC status for SS MUX select and enable source VBUS power. When the USB host is shutdown, disable the VBUS power. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-09-14MLK-16431-2 imx8qxp_mek: Add driver for USB typec port controller (TCPC)Ye Li
Add an simple driver for USB typec port controller in freescale common codes. The functions in this driver help to initialize the TCPC, set and work with fixed DFP role. Will improve it later to support UFP and move to driver directory. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-09-14MLK-16431-1 xhci-imx8: call board_usb_cleanup when xhci stopYe Li
Call the board_usb_cleanup in xhci_imx8_remove (DM) and xhci_hcd_stop (non-DM) to execute some board level usb stop in cc logic and ss mux. Signed-off-by: Ye Li <ye.li@nxp.com>
2017-09-14MLK-16465: fine tune build info to find it easily.Frank Li
Find buildinfo easily and copy everything just one click U-Boot 2017.03-00031-g0596078-dirty (Sep 13 2017 - 10:59:41 -0500) CPU: Freescale i.MX8QXP revA A35 at 1200 MHz at 6C Model: Freescale i.MX8QXP LPDDR4 ARM2 Board: iMX8QXP LPDDR4 ARM2 Boot: SD1 DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 [pcie_ctrlb_sata_phy_init_rc] LNK DOWN 8600000 In: serial Out: serial Err: serial BuildInfo: - SCFW f0cb8b8e, IMX-MKIMAGE cc994971, ATF 0 - U-Boot 2017.03-00031-g0596078-dirty switch to partitions Signed-off-by: Frank Li <Frank.Li@nxp.com>
2017-09-14MLK-16467 serial_lpuart: Fix FIFO_RXFE definition in LPUART driverYe Li
Accroding to RM, the Receive FIFO Enable (RXFE) field in LPUART FIFO register is bit 3, so the definition should change to 0x08 not 0x40. Otherwise the Receive FIFO is not disabled. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-13imx8: add board_name and board_revAdrian Negreanu
Export the board_name and board_rev for these boards: - 8MQ EVK - 8QM ARM2 - 8QXP ARM2 - 8QXP MEK These two variables are used by an autotest u-boot script, to request the needed BSP files. Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2017-09-13MLK-16451 imx8qm/qxp: Enable PSCI resetYe Li
Since the arm trusted firmware has implemented the system reset in PSCI. We can enable the CONFIG_PSCI_RESET to call PSCI API to reset the u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-13MLK-16443 imx8qm/qxp: Fix UART pad settingYe Li
Found kernel won't be loaded when UART does not connect to the board. This is because UART received one data with frame error in this case, and stop in u-boot console. The root cause is we set wrong pad setting for UART. The pad should be set to pull up not pull down. The pull down will cause problem to UART START bit. This patch fix the UART pad to 0x600020 (input and output, high drive strength, and pull up). Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-12MLK-16441-2 imx8qm/qxp: print commit hash for SCFW, IMX-MKIMAGE and ATFYe Li
Since we have many software running on QM/QXP, it is better to print their commit ids in u-boot to know their versions. This patch enables the CONFIG_ARCH_MISC_INIT. In arch_misc_init to gets the commit ids for SCFW and ATF via their APIs and get the commit for imx-mkimage at the end of u-boot.bin loading address. Once the commit ids are acquired, show them in console like: BuildInfo: SCFW 45c567e8, IMX-MKIMAGE cc994971, ATF 0a9efa7 and set them to environment variables like: commit_atf=0a9efa7 commit_mkimage=cc994971 commit_scfw=45c567e8 If old software are running which does not support provide commit it, the patch use 0 instead. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-12MLK-16441-1 imx8qm/qxp: Update scfw apiYe Li
Update SCFW API to latest commit 45c567e830b2b915982ea5f2fcd60d235991a415 which contains new API to get build info for SCFW. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-09-12MA-10217 bootloader mode not function if there is a unknown cmd in miscguoyin.chen
System cannot run into bootloader/recovery mode once there is unknown cmd in misc partition as: 1. uboot will never clean the unknown cmd. 2. init will never overwrite the unknown cmd. arm2_8q:/ # reboot bootloader init: [libfs_mgr]fs_mgr_read_fstab_dt(): failed to read fstab from dt init: reboot-bootloader: Error writing bootloader_message: Bootloader command pending. init: Reboot start, reason: reboot,bootloader, rebootTarget: bootloader Change-Id: I51043e7cbde3f3e508c5fe99e9dba27e5f99f443 Signed-off-by: guoyin.chen <guoyin.chen@nxp.com>
2017-09-07MA-9554[Android_6DL_SD]RTC: Sometimes the RTC reset to the initial time 1970 ↵Zhang Bo
after softare reboot the first time. 40% RTC timer is default disabled after power off and bootup again. it will be enabled in kernel rtc driver init. But rtc time is shorter than system clock, so rtc time cannot update to system clock in rtc_hctosys(), and the sysfs file /sys/class/rtc/rtc0/hctosys cat result is 0. Android AlarmManagerService cannot work normally when hctosys is 0. Enable RTC in u-boot so the time in RTC timer is longer than system clock. Change-Id: Ie8b1c1b36e5ab48031efe44dd06468ac35ca3d3b Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
2017-09-07MA-10167 Add soc_type to be imx8mq to align the init.imx8mq.rcguoyin.chen
It will be used by android init to load the init.imx8mq.rc Change-Id: Id157cfe6952c9ccf4021d9098e25d9e9d545859f Signed-off-by: guoyin.chen <guoyin.chen@nxp.com>
2017-09-05MLK-16369 eth: fec: Fix DM driver issue in recvYe Li
When using ethernet DM driver, the recv interface has a change with non-DM interface, that driver needs to set the packet pointer and provide it to upper layer to process. In fec driver, the fecmxc_recv functions does not handle the packet pointer parameter. This may cause crash in upper layer processing because the packet pointer is not set. This patch allocates a buffer for the packet pointer and free it through free_pkt interface. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-09-05MLK-16365 mmc: add sd/mmc legacy capabilityPeng Fan
Add SD/MMC legacy capability. Otherwise the legacy cards supports will be broken. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-09-04MLK-16361-2 imx8qm/qxp: Use sw_info for USB boot checkYe Li
The sw_info in handover structure has included the boot device info provided by SC ROM. We can exploit this info, no need to check the USB2 PHY PWD register. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-09-04MLK-16361-1 imx8qm/qxp: Send boot status to SCFW if booted by SC ROMYe Li
We met u-boot hang when booting from eMMC fastboot on QM/QXP boards. The hang happens on u-boot accessing USB2 PHY for checking USB boot. The root cause is when putting AP image (u-boot-atf.bin) in first container, the USB2 PHY reset bit won’t be set in CONN SS by SCFW, because this SS has been powered on by SC ROM. In normal boot case, we won't meet such issue. Because we put u-boot-atf.bin in second container and AP ROM will boot up for loading this binary. When AP ROM completes the loading, it calls “misc_boot_status” API to power off the boot device and also power off the CONN SS. Then when u-boot enables any the module in CONN, the CONN SS will power on again by SCFW and set the USB2 PHY reset bit. Since the clock settings are different in SC ROM and SCFW, so it is suggested to power off CONN SS when booting is completed. In this patch, we check the g_ap_mu field in pass over structure which is used to pass into from SC ROM to AP ROM. This field is set only when AP image is included in the second container. If this field is not set, we suppose the booting only uses SC ROM, then u-boot calls "misc_boot_status" at early stage to power off boot device. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-08-31MA-10118-1[Android EVK-8MQ] realize the get_board_serial function which read ↵Zhang Bo
unique id from ocopt Correct fuse_bank0_regs structure to make bank register be match with fuse map. Change-Id: I023c7d57b9fe1d57b0c2735f058714e9f25dca56 Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
2017-08-30MLK-16333 imx8qm/qxp: Change memory region 0x0-0x1c000000 to strongly orderYe Li
This memory region is for LSIO subsystem, including OCRAM, AP ROM, flexspi0 mapped memory and flexspi1 buffer. If we set it to cachable, the AHB read in flexspi driver will have coherence problem. This patch set this memory region to strongly order to avoid any issue in driver. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-08-30MLK-16326 imx8qxp_mek: Add LVDS0 display support for splash screenYe Li
The MEK board has two display ports, we enable the LVDS0 as default display. User needs to connect miniSAS LVDS to HDMI card on the CPU board and set "panel" env variable to "IT6263" to enable the display. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-08-30MA-10118[Android EVK-8MQ] realize the get_board_serial function which read ↵Zhang Bo
unique id from ocopt Read the unique id directly from the ocopt register. Change-Id: I6cfb246153812709ea98edd5b9a85aff4714a329 Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
2017-08-29MLK-16288 fsl_esdhc: Workaround for eMMC HS200 and SD SDR104 switch fail issueYe Li
Met randomly switch fail (60%) on 8QXP ARM2 A1 board, when entering eMMC HS200 or SD SDR104 mode. The failure happens on the first command (CMD55 for SD, CMD8 for eMMC) after the tuning process is done. The failure error is CTOE (command timeout). Can't reproduce it on QXP MEK. This patch addes a workaround to send CMD12 after tuning process is done. This helps to stop any transmission that device may involve during tuning. The stress test is passed on QXP ARM A1 with this workaround added. Also this patch fixes a issue for tuning parameter "tuning_start_tap". Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-08-29MLK-16292 DTS: imx8qm/qxp: Update usdhc pad settings to fix DSE issueYe Li
Sychronize the usdhc pad settings from kernel DTS file to fix DSE setting problem. For dual voltage pads, only bits[0] is defined for DSE. 0: high drive strength 1: low drive strength Kernel commit: 7084cf02e6cc2c9fb7f474f6cc1ba8f8d00793c7 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-08-29MLK-16247 imx8/imx8m: Rename env variable fdtaddr to fdt_addrYe Li
i.MX6/7 uses fdt_addr while all i.MX8/8M uses fdtaddr, this causes the env is inconsistent for the autotest u-boot scripts. So rename the fdtaddr to fdt_addr. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-08-29MLK-16249 mx6dlsabresd: Fix the VDD ARM voltage for 396MHz CPU freqYe Li
According to the MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015) "LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation up to 396 MHz." So change the VDD ARM to 1.15V (with 25mv margin). Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
2017-08-29MLK-16289 pca953x_gpio: Fix build warningYe Li
Fix uild warning below introduced by commit: cb20ff23c83b80b4115c8a44ea436cb6b40429f1 drivers/gpio/pca953x_gpio.c: In function ‘pca953x_probe’: drivers/gpio/pca953x_gpio.c:325:48: warning: passing argument 3 of ‘pca953x_write_regs’ from incompatible pointer type [-Wincompatible-pointer-types] ret = pca953x_write_regs(dev, PCA953X_INVERT, &val); ^ drivers/gpio/pca953x_gpio.c:135:12: note: expected ‘u8 * {aka unsigned char *}’ but argument is of type ‘u8 (*)[5] {aka unsigned char (*)[5]}’ static int pca953x_write_regs(struct udevice *dev, int reg, u8 *val) Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-08-29MLK-16287 imx8qxp_arm2: increase the off-on-delay for usdhc2 vmmc supplyYe Li
Current value of "off-on-delay-us" is 3500us for usdhc2 vmmc regulator, this is measured value but not have margin added. We found QXP ARM2 RevA1 board can't work with this value. So increase it to 5000us with 1500us margin added. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2017-08-29MA-10079 [Android] enable fastboot for imx8mqzhang sanshan
enable CONFIG_CMD_FASTBOOT which support command:"fastboot 0" enable CONFIG_FASTBOOT_FLASH wihch support commands:"fastboot flash XXX" Change-Id: I514e2d5ea221a8551f4afa799fa5b48e4373fca4 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
2017-08-29MLK-16273-3 imx8mq: evk: enable usb gadget driversLi Jun
Enable dwc3 controller driver and gadget mass storage drivers. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2017-08-29MLK-16273-2 imx8mq: evk: add usb init for USB0 device modeLi Jun
Add USB0(type-c) config and PHY init to enable device mode. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2017-08-29MLK-16273-1 usb: dwc3: add suspend clock setting interfaceLi Jun
Some dwc3 based USB3 IP may have a wrong default suspend clk setting, so add an interface to correct it by board setting. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2017-08-29usb: gadget: g_dnl: only set iSerialNumber if we have a serial#Felipe Balbi
We don't want to claim that we support a serial number string and later return nothing. Because of that, if g_dnl_serial is an empty string, let's skip setting iSerialNumber to a valid number. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> (cherry picked from commit 842778a091047b0c868efa12229633959f711152)
2017-08-29usb: gadget: g_dnl: don't set iProduct nor iSerialNumberFelipe Balbi
Both these numbers are calculated in runtime and dynamically assigned to the device descriptor during bind(). Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> (cherry picked from commit 207835b13feeae15db0555574d89352a4e5379a4)
2017-08-29usb: dwc3: gadget: make cache-maintenance on event buffers more robustPhilipp Tomsich
Merely using dma_alloc_coherent does not ensure that there is no stale data left in the caches for the allocated DMA buffer (i.e. that the affected cacheline may still be dirty). The original code was doing the following (on AArch64, which translates a 'flush' into a 'clean + invalidate'): # during initialisation: 1. allocate buffers via memalign => buffers may still be modified (cached, dirty) # during interrupt processing 2. clean + invalidate buffers => may commit stale data from a modified cacheline 3. read from buffers This could lead to garbage info being written to buffers before reading them during even-processing. To make the event processing more robust, we use the following sequence for the cache-maintenance: # during initialisation: 1. allocate buffers via memalign 2. clean + invalidate buffers (we only need the 'invalidate' part, but dwc3_flush_cache() always performs a 'clean + invalidate') # during interrupt processing 3. read the buffers (we know these lines are not cached, due to the previous invalidation and no other code touching them in-between) 4. clean + invalidate buffers => writes back any modification we may have made during event processing and ensures that the lines are not in the cache the next time we enter interrupt processing Note that with the original sequence, we observe reproducible (depending on the cache state: i.e. running dhcp/usb start before will upset caches to get us around this) issues in the event processing (a fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the first time interrupt handling is invoked) when running USB mass storage emulation on our RK3399-Q7 with data-caches on. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> (cherry picked from commit 889239d6b5c15c82d507498ded5e3b8fea2d44cf)
2017-08-29usb: dwc3: ensure consistent types for dwc3_flush_cachePhilipp Tomsich
The dwc3_flush_cache() call was declared and used inconsistently: * The declaration assumed 'int' for addresses (a potential issue when running in a LP64 memory model). * The invocation cast the address to 'long'. This change ensures that both the declaration and usage of this function consistently uses 'uintptr_t' for correct behaviour even when the allocated buffers (to be flushed) reside outside of the lower 32bits of memory. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> (cherry picked from commit b7bf4a95922c3e1a4974aa34ebb714ac2eb89937)
2017-08-25MLK16263 - Update uboot to the latest SCFW APIRanjani Vaidyanathan
Update uboot to the latest SCFW based on commit: " commit 129c16e312334af7b07d71d6dccac1cda1808b93 Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Date: Thu Aug 24 16:50:59 2017 -0500 Add support to change DRC clock rate. " Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2017-08-25MLK-16268 arm: dts: 8qxp: add delay-us for usdhc2Peng Fan
Measured signal using oscilloscope. Add startup delay and off-on-delay-us to make usdhc2 vmmc supply work properly. Otherwise, the delay between power off/on is short and power actully not off, then card report S18A as 0 and could not switch voltage to 1.8V. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-08-23MLK-16246 imx8mq_evk: Update DTB to disable DCSS and HDMI for mfgtoolYe Li
When booting for mfgtool, we need to disable DCSS and HDMI since the HDMI firmware won't be loaded by mfgtool. Add the detect in u-boot and update the DTB. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-08-22MLK-16238-3 imx8m_evk: Update codes to enable TMUYe Li
Update SoC codes, DTSi and defconfig to enable TMU for i.MX8M EVK board. Also implement functions to get speed grade and market segment info from fuse. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
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