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2013-01-11colibri_t30: fix MMC/SD card detect GPIOT30_LinuxImageV2.0Beta1_20130314T30_LinuxImageV2.0Alpha1_20130122T20_LinuxImageV2.0_20130305T20_LinuxImageV2.0Beta2_20130129Apalis_T30_LinuxImageV2.0Alpha1_20130315Marcel Ziswiler
The Colibri T30 V1.1 modules actually use a different card detect GPIO.
2013-01-11colibri_t30: migrate to proper machine typeMarcel Ziswiler
After having registered the following proper machine type migrate to actually using it. http://www.arm.linux.org.uk/developer/machines/list.php?id=4493 While at it clean-out some obsolete Cardhu specific device-tree nodes resp. properties and clean-up the mach-types header file as well.
2013-01-08T30: cmdline with rootfs mounted noatime, not the default relatimeMax Krummenacher
2012-12-27T30: cmdline with ext3 rootfs, not ext2T30_LinuxImageV2.0Alpha0_20121227Max Krummenacher
2012-12-19toradex: common: clean-up board fileMarcel Ziswiler
This is a purely cosmetic clean-up of the common Toradex board file.
2012-12-18T30: define USE_PRIVATE_LIBGCC, oe-core can't build withoutT20_LinuxImageV2.0Beta1_20121218Max Krummenacher
2012-12-18u-boot: compile with -O2, some compilers can't cope with -OsMax Krummenacher
2012-12-13colibri_t20: add optional 800x480 timingMarcel Ziswiler
Add optional aka commented out 800x480@60 timing suitable for EDT ET070080DH6.
2012-12-04colibri_t30: USB: fix Ethernet detection faultMarcel Ziswiler
Turns out our simplistic approach of just blindly enabling LAN_V_BUS and releasing LAN_RESET_N does not prove very reliable. Properly resetting the chip for 5 microseconds after VBUS is stable just like we do on the Colibri T20 seems to fix the issue.
2012-12-04colibri_t20/colibri_t30: device tree compatibility matchingMarcel Ziswiler
Include "colibri_" prefix in our board compatibility tables in preparation to properly distinguish future e.g. Apalis modules. While at it bring the device tree matching more in par with Linux kernel 3.1.10 from NVIDIA's L4T R16-R2.
2012-11-28T30:Max Krummenacher
- board.c: changes required by different PMIC variant
2012-11-28T30: - exclude T20 RAM sizeMax Krummenacher
2012-11-28CPU reset bitfields: - fix bitpositions in ↵Max Krummenacher
CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0
2012-11-28ap20.c: - fix FLOW_MODE field location, is 31:29 according to register ↵Max Krummenacher
description in Android code. no bug visible as function is not called with run = 1
2012-11-28ap20.c: - fix use of interleaved use of struct pll vs. struct pll_simple ↵Max Krummenacher
here this use did not show any adverse effects
2012-11-09colibri_t20: USB: fix Ethernet detection faultMarcel Ziswiler
Turns out we completely missed properly resetting the ASIX USB to FastEthernet chip which from time-to-time on certain modules caused severe Ethernet detection faults only a complete hardware reset or power-cycle could eliminate. Properly resetting the chip for 5 microseconds after VBUS is stable seems to fix the issue.
2012-10-31Merge branch 'colibri' of git://git.toradex.com/u-boot-toradex.git into colibriMax Krummenacher
2012-10-31T30: colibri_t30.hMax Krummenacher
- kernel can now be up to 8MB - cleanup, e.g. remove any NAND config - unify with T20 file layout
2012-10-31colibri_t20: nand: fix NVIDIA partition table parsingMarcel Ziswiler
If the USR partition we usually mount as root file system could not be found which is e.g. the case for Android make sure mtdparts does not start with a spurious coma separator the kernel would interpret as an empty partition entry.
2012-10-30Merge branch 'colibri' of git://git.toradex.com/u-boot-toradex.git into colibriMax Krummenacher
2012-10-30Merge branch 'chromeos-v2011.06' into colibriMarcel Ziswiler
Conflicts: arch/arm/cpu/armv7/tegra3/warmboot_avp.c arch/arm/include/asm/arch-tegra/clk_rst.h
2012-10-29Merge branch 'colibri' of git://git.toradex.com/u-boot-toradex.git into colibriMax Krummenacher
2012-10-29tegra: add enterrcm commandStephen Warren
tegra: add enterrcm command Tegra's boot ROM supports a mode whereby code may be downloaded and flash programmed over a USB connection. On dev boards, this is typically entered by holding down a "force recovery" button and resetting the CPU. However, not all boards have such a button (one example is the Compulab Trimslice), so a method to enter RCM from software is useful. This change implements the command "enterrcm" to do this, and enables it for all Tegra boards by default. Even on boards other than Trimslice, controlling this over a UART may be useful, e.g. to allow simple remote control without the need for mechanical button actuators, or hooking up relays/... to the button. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-26Merge branch 'colibri' of git://git.toradex.com/u-boot-toradex.git into colibritrdx
2012-10-25colibri_t20: fix SD bootMarcel Ziswiler
As the kernel recently passed the 4 MB size limit simply copying 4 MB won't quite cut it. Increase to 8 MB for now. In the future properly parsing the SD card's partition table would be the way to go.
2012-10-24colibri_t30: fix buildMarcel Ziswiler
Fix build issues introduced with NVIDIA partition table parsing integration.
2012-10-18Merge branch 'colibri' of git://git.toradex.com/u-boot-toradex into colibritrdx
2012-10-18colibri_t20: fix SD bootT20_LinuxImageV2.0Alpha2_20121019Marcel Ziswiler
If booting from SD card BCT contains information specific to SD card partition layout which is bogus if used for NAND partition parsing. Simply fall back to default offset just like in recovery BCT case. Note: in the future we could parse SD partition table as well to more generically support SD booting from various card densities.
2012-10-18colibri_t20: nand: change offset handlingMarcel Ziswiler
Rather than relying on hard-coded offsets actually make use of partition table parsing implementation.
2012-10-18colibri_t20: nand: integrate NVIDIA partition table parsingMarcel Ziswiler
NVIDIA's NAND layout includes a partition table that can be used to generically construct the mtdparts kernel boot argument. As an added benefit this is completely independent of the underlying NAND part used which differs with various module versions. It further allows our customer easy adoption to their own custom partition layout. Initial partition table parsing courtesy of Mitja Špes from LXNAV.
2012-10-18colibri_t20: fix SD bootMarcel Ziswiler
If booting from SD card BCT contains information specific to SD card partition layout which is bogus if used for NAND partition parsing. Simply fall back to default offset just like in recovery BCT case. Note: in the future we could parse SD partition table as well to more generically support SD booting from various card densities.
2012-10-18colibri_t20: nand: change offset handlingMarcel Ziswiler
Rather than relying on hard-coded offsets actually make use of partition table parsing implementation.
2012-10-18colibri_t20: nand: integrate NVIDIA partition table parsingMarcel Ziswiler
NVIDIA's NAND layout includes a partition table that can be used to generically construct the mtdparts kernel boot argument. As an added benefit this is completely independent of the underlying NAND part used which differs with various module versions. It further allows our customer easy adoption to their own custom partition layout. Initial partition table parsing courtesy of Mitja Špes from LXNAV.
2012-10-18colibri_t20: fix SD boot bootdeviceMarcel Ziswiler
Change SD boot bootdevice in environment variable sdargs from mmcblk3p1 to mmcblk0p1 due to later kernels using a different numbering scheme. While at it clean-up some white space indentation stuff.
2012-10-18colibri_t20: add sanity check to board_query_sdram_size()Marcel Ziswiler
Colibri T20 does not use OdmData but rather relies on memory controller configuration done by boot ROM based on BCT information. Unfortunately it is possible to at least boot a 256 MB module with a 512 MB BCT therefore double check whether we really do have that.
2012-10-18tegra 30: PMIC init commentMarcel Ziswiler
Add comment concerning PMIC initialisation of VDD_CPU via VDDCtrl.
2012-10-16colibri_t20: modify order of console boot argumentMarcel Ziswiler
User space tools like init just use last console kernel boot argument as their one and only console. Re-order them in order to output boot messages on serial debug console.
2012-10-15Examples: Properly append LDFLAGS to LD commandMarek Vasut
Examples: Properly append LDFLAGS to LD command The LD command in examples/standalone/Makefile ignored platform specific LDFLAGS setup. Pass these LDFLAGS to the command. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de>
2012-09-26colibri_t20: activate backlight gpioMarcel Ziswiler
Activate BL_ON backlight GPIO PT4 on SODIMM pin 71. While at it add commented out XGA 1024x768 display timing values as well.
2012-08-22Initial Toradex Colibri T20 L4T R15 support.T20_LinuxImageV2.0Alpha1_20120808Marcel Ziswiler
2012-07-18tegra: fdt: Change load entry to 0x1080000Jimmy Zhang
Change tegra2's entry address to its default address 0x108000. BUG=none TEST=flashed with local built u-boot. Kernel boots up fine. Change-Id: I6ff4ed1f2901df73b21d033fbd191550108e96b5 Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/22171 Reviewed-by: Simon Glass <sjg@chromium.org>
2012-07-18tegra: config: Change load entry to 0x108000/0x80108000Jimmy Zhang
0x108000/0x80108000 is used as tegra2/tegra3's default boot loader entry address. This change makes u-boot to comply with nvidia standard flash tools. BUG=none TEST=run cros_write_firmware with local build u-boot. Kernel boots up fine. Change-Id: I55e9b5d1847cf7e6a94d362935deef5f6855ba5a Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/21979 Reviewed-by: Simon Glass <sjg@chromium.org>
2012-06-05arm: tegra3: Fix bootup up issuePuneet Saxena
At bootup time device enters in standby state as CLK_RST_CONTROLLER_SCLK_BURST_POLICY is not set correctly. This change correctly sets clock burst policy. BUG = None TEST= Build OK for Seaboard,Cardhu and Waluigi. Tested on Cardhu and waluigi. Device boots up. Change-Id: I598ca7bcfc4a39ecaa68c211d3439ac3569c6e44 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/24164 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Tested-by: Tom Warren <twarren@nvidia.com> Commit-Ready: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2012-04-30arm: tegra2: seaboard: Enable CRC32 v optionJimmy Zhang
The cros_write_firmware has updated flash script command 'crc32' with -v option. To support this change, u-boot needs to be built with CONFIG_CRC32_VERIFY for seaboard. BUG=none TEST=run cros_write_firmware with local build u-boot. Change-Id: I49046ce2424c4624a335af32051421e44bd388bb Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/21420 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mark Zhang <markz@nvidia.com> Reviewed-by: Wei Ni <wni@nvidia.com>
2012-04-25Provide alternative config for netbootingVadim Bendebury
This change allows to build a customized u-boot image, which includes networking capabilities, provides diagnostic commands and supports command line editing. These features are necessary to facilitate the factory flow. This image needs to be clearly distinguishable by ChromeOS. This is achieved by modifying the value presented by the BINF.3 ACPI object. To build this modified image one needs to add BUILD_FACTORY_IMAGE=1 to the make invocation line. BUG=chrome-os-partner:7952 TEST=manual . build the new firmware image as follows: USE='pcserial factory-mode' emerge-link chromeos-u-boot \ chromeos-coreboot chromeos-bootimage . program the new image on the Link target with ChromeOS installed on the SSD and restart it . observe the target stop at u-boot command prompt (boot >) . connect the target to an Ethernet network with a DHCP server using a USB Ethernet dongle . run the following commands at the u-boot prompt boot > usb start (Re)start USB... USB: Register 203007 NbrPorts 7 USB EHCI 1.00 Register 20400b NbrPorts 11 USB EHCI 1.00 8 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found scanning bus for ethernet devices... 1 Ethernet Device(s) found boot > dhcp Waiting for Ethernet connection... done. BOOTP broadcast 1 BOOTP broadcast 2 [a few warnings of unsupported DHCP options] DHCP client bound to address 172.22.75.25 Using asx0 device TFTP from server 172.16.255.7; our IP address is 172.22.75.25; sending through gateway 172.22.75.254 Filename 'pxelinux.0'. Load address: 0x100000 Loading: ## done Bytes transferred = 15840 (3de0 hex) boot > . start ChromeOS on the target by issuing vboot_twostop . once ChromeOS boots check the mainfw_type crossystem reported value localhost ~ # echo $(crossystem mainfw_type) netboot localhost ~ # Change-Id: I1c50517754b6b5f773e432b9adec4b290f303e6f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/21071 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2012-04-10x86: Fix TPM driver to work with multiple vendor TPMsDuncan Laurie
- Fix bug in traversal of vendor name list. - Sending "command ready" needs additional logic to handle TPMs that need that bit set twice: once to empty the read FIFOs and once to actualy set command ready. - Certain TPMs need a small delay between requesting locality and attempting to set command ready or they will hang the bus. BUG=chrome-os-partner:8558 TEST=manual Successful boot and suspend/resume with all TPMs listed in the driver vendor/device list. Change-Id: I22021b24f9498c3cafe0e1d5f1c6562ea0be5aad Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/18480 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
2012-03-29Make u-boot recognize full range of PPT LPC controllersVadim Bendebury
The full range of LPC controllers should be accepted by u-boot when looking for the SPI controller. The values come from Intel's Panther_Point_EDS_v072.pdf (document #472178). BUG=chrome-os-partner:7734 TEST=manual . program the new image on the target . reboot it and observe coming up to ChromeOS login screen Change-Id: Id8f7068c3b48885f868a1f30e7927e678d2154b6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/19147 Reviewed-by: Jon Salz <jsalz@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/19310 Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
2012-03-21Increase size of MRC cache on LinkStefan Reinauer
Link's MRC produces significantly more training data than the one used on Stumpy/Lumpy. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> BUG=none TEST=boot tested on Link Change-Id: I9310c3bcc77fb4318db0635b97b115ab0eb7e5ec Reviewed-on: https://gerrit.chromium.org/gerrit/18748 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2012-03-20spi: Atmel: Add support for AT25DFTom Warren
Cardhu boards can use Atmel and Winbond SPI flash parts - support both in one binary. BUG=chromium-os:23496 TEST=build all OK, test on Cardhu. 'sf probe 0' returns: SF: Detected AT25DF321A with page size 256, total 4 MiB. sf read/write/erase all work OK. Signed-off-by: Tom Warren <twarren@nvidia.com> Change-Id: I7df3abb030a49b572e1172ca77227cd4d63e0c21 Reviewed-on: https://gerrit.chromium.org/gerrit/18539 Reviewed-by: Mike Frysinger <vapier@chromium.org>
2012-03-19x86: Make RW unused section labels uniqueDuncan Laurie
BUG=none TEST=check fmap on generated binary for unique names Change-Id: Id1ac5cf223ec6a333fc8f4c587e972afd087f90d Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/18435 Reviewed-by: Stefan Reinauer <reinauer@google.com>
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