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With CONFIG_SPL_SILENT_CONSOLE the 'U-Boot SPL...' version string is
no longer linked into the SPL binary.
Factor out the version string and make sure that it is not optimize
away by lto.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits also on UARTs not used in the boot loader to prevent
an interrupt storm when Linux enables the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits to prevent an interrupt storm when Linux enables
the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This adds a Kconfig SPL_SILENCE_CONSOLE which allows to suppress any
console output which in the normal program flow is printed in the SPL.
Error messages and the likes will still be printed.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This adds a Kconfig DISABLE_CONSOLE_IN_SPL which allows to suppress any
console output in the SPL.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use i.MX bootaux support introduced for i.MX 6SoloX/i.MX 7 for
Vybrid too. Starting the Cortex-M4 core on Vybrid works a bit
differently, namely it uses a GPR register to define the initial
PC. There is no way to define the initial stack (the stack is
set up in a boot ROM). This is not a problem for most firmwares
since the firmwares startup code reinitialize the stack as part
of the firmware startup code anyway.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Move Freescale/NXP Vybrid to a standard arch/board approach, similar
to what has been done to i.MX 6 earlier in commit 89ebc82137be ("ARM:
mx6: move to a standard arch/board approach").
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Support elf firmware files for the auxiliary Cortex-M4 core. This
has the advantage that the user does not need to know to which
address the binary has been linked to. However, in order to load
the elf sections to the right address, we need to translate the
Cortex-M4 core memory addresses to primary/host CPU memory
addresses (U-Boot is typically running on the A7/A9 core). This
allows to boot firmwares from any location with just using
bootaux, e.g.:
tftp ${loadaddr} low_power_demo.elf && bootaux ${loadaddr}
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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For i.MX 6SoloX/i.MX 7 simple binary files are used to boot the
auxiliary CPU core (Cortex-M4). This patch moves the "parsing" of
this binary firmwares to the SoC independent code. This allows to
add different binary formats more easily.
While at it, also move the comment about the inner workings how
to boot the Cortex-M4 core to a more appropriate location.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use device-tree fixup to communicate the MTD partitions to the
kernel. Remove mtdparts from the kernel command line.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Disable 3.3V Ethernet and ARM rail when entering sleep mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Commit 3f353ceccbbb ("vf610: refactor DDRMC code") changed on-die
termination (ODT) values from 120 Ohm to 60 Ohm and enabled a static
read/write leveling which has not been tested with this board. This
commit reverts both changes and makes sure that memory gets
initialized as it has been done before the mentioned commit.
Fixes: 3f353ceccbbb ("vf610: refactor DDRMC code")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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This adds a command which parses the SPL version from eMMC and
optionally compares it against a version string.
Usage:
Colibri iMX6 # splver
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
Colibri iMX6 # splver "U-Boot SPL 2016" || echo update
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
Colibri iMX6 # splver "U-Boot SPL 2017" || echo update
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
update
Colibri iMX6 # splver "U-Boot SPL 2016.11-rc4" || echo update
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
update
Colibri iMX6 #
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Implement board level USB PHY mode callback. On USB OTG Port 1
the Colibri standard foresees GPIO USBC_DET to decide whether the
port should run in Host or Device mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Enable Serial Download Protocol (SDP) in SPL. This is useful to
make use of imx_usb to download the complete U-Boot (u-boot.img)
after SPL has been downloaded.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Use a completely independent USB Product ID for SPL. This allows
to differentiate a SDP running in SPL and SDP running in a U-Boot
which could not read the config block successfully.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add USB serial download protocol support to SPL. If the SoC started
in recovery mode the SPL will immediately switch to SDP and wait for
further downloads/commands from the host side.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Before commit 81c4eccb55cc ("imx: mx6: fix USB bmode to use
reserved value") a non-reserved value has been used to trigger
Serial Downloader using bmode. On some boards this value lead to
unreliable bmode command. With the above mentioned commit, U-boot
switched to use [7:4] b0001, which translates to GPR9 0x10 for
Serial Downloader mode. Check for this new bmode and classify it
as Serial Downloader.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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When starting i.MX SoC's with BOOT_MODE b01, the boot ROM enteres
Serial Downloader mode. However, serial download does not necessarily
means booting from UART. The boot ROM also supports booting from USB.
Create a technology neutral boot mode called SDP (serial download
protocol).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Move the imximage.h header file to a common location so we can make
use of it from U-Boot too.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add new command to start USB Serial Download Protocol (SDP) state
machine.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Support U-Boot images in SPL (which makes it possible to download
u-boot.img) and U-Boot scripts in full U-Boot.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add SDP (Serial Downloader Protocol) implementation for U-Boot. The
protocol is used in NXP SoCs boot ROM and allows to download program
images. Beside that, it can also be used to read/write registers and
download complete Device Configuration Data (DCD) sets. Currently,
this implementation only supports downloading images and reading
registers.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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When booting we see:
DRAM: 256 MiB
<strange characters>FSL_SDHC: 0, FSL_SDHC: 1
auto-detected panel vga-rgb
The should be:
DRAM: 256 MiB
PMIC: device id: 0x10, revision id: 0x11, programmed
MMC: FSL_SDHC: 0, FSL_SDHC: 1
auto-detected panel vga-rgb
This seems to be caused by the call to initr_serial which
in our configuration goes into drivers/serial/serial-uclass.c
serial_initialize().
Printing an empty line helps. The empty line gets deleted and
no strange characters appear.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Keep debug code at the end of the function.
Use a one line informational message for the PMIC only.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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SATA is not accessible on the Colibri iMX6, so remove include and
conditionally executed code.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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We rely on u-boot to patch up the "fsl,vf610-ddrmc" node to have
the fsl,has-cke-reset-pulls property without which the Vybrid PM
code does not enable suspend to mem option. If Toradex config
block option is enabled, patch up the device tree for the same.
Signed-off-by: Sanchayan Maity <sanchayan.maity@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Fix the following boot hang observed when booting our downstream L4T
R16.5 based BSP:
[ 0.900129] kernel BUG at /build/linuxdev/oe-core_V2.7/build/tmp-
glibc/work-shared/colibri-t20/kernel-source/drivers/spi/spi-tegra.c:258!
[ 0.912478] Internal error: Oops - undefined instruction: 0 [#1]
PREEMPT SMP
[ 0.919525] Modules linked in:
[ 0.922586] CPU: 0 Not tainted (3.1.10-v2.7b1+g7e628fd #1)
[ 0.928428] PC is at spi_tegra_isr.part.0+0x14/0x18
[ 0.933310] LR is at spi_tegra_isr+0x38/0x7c
[ 0.937580] pc : [<c05c25e8>] lr : [<c0334d4c>] psr: 60000193
[ 0.937585] sp : c8075c40 ip : c8075c50 fp : c8075c4c
[ 0.949062] r10: c08a2f20 r9 : c08a2f74 r8 : 00000000
[ 0.954285] r7 : c8074000 r6 : c81545c0 r5 : c08a2f74 r4 : c81545b0
[ 0.960810] r3 : 00000000 r2 : 00000001 r1 : 60000193 r0 : 60000193
[ 0.967336] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM
Segment kernel
[ 0.974734] Control: 10c5387d Table: 0000404a DAC: 00000015
While at it also fix the following clock initialisation related errors:
[ 0.000000] tegra_dvfs: rate 216000000 too high for dvfs on sdmmc1
[ 0.000000] Unable to set clock sdmmc1 to rate 48000000: -22
[ 0.000000] tegra_dvfs: rate 216000000 too high for dvfs on sdmmc3
[ 0.000000] Unable to set clock sdmmc3 to rate 48000000: -22
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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The EFI loader is for most use cases not necessary so disable it
by default.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
(cherry picked from commit df9aa4068201394a9b2d7c30fbf34a815467c2d2)
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In the linux device tree we use 40Ohm drive strenght. So use the same
value in U-Boot.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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In the linux device tree we use 40Ohm drive strenght. So use the same
value in U-Boot.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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During porting to 2016.11 the check of a SD (mmc2) interface
was dropped, this was unintended.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Enable default boot command.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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U-Boot has grown to big with the enablement of FIT image. Since we
boot from a separate UBI volume, U-Boot does not need access to the
UBIFS. Also fix the maximum size, also consider the text base offset
in gfxRAM.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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FIT image support is used by the upcoming Toradex Easy Installer
and also can be useful for more advanced boot scenarios.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Rather than relying on our separate proprietary storage media dependent
boot commands use regular distro boot as a fall back.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Implement optional PCIe EvalBoard initialisation which properly reset the PLX
(now Avago) PEX 8605 PCIe switch plus PCIe devices on the Apalis Evaluation
carrier board.
Please note that you will have to enable the second PCIe port in the dts as well
e.g.:
diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts
index be4f4d6..321c7d6 100644
--- a/arch/arm/dts/tegra30-apalis.dts
+++ b/arch/arm/dts/tegra30-apalis.dts
@@ -59,6 +59,7 @@
};
pci@2,0 {
+ status = "okay";
nvidia,num-lanes = <1>;
};
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit 340f51a210df1da640a57267e6c7fa56b8a852ed)
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If U-Boot was launched via USB recovery mode stop auto booting.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Just release TPS65911 GPIO1 (EN_CORE_DVFS_N) connected to TPS62362
VSEL1 to switch VDD_CORE back to boot set 1 defaulting to 1.200V.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit 622d408fea7af6d2ed778b546de346e90ea1a21f)
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit 0a9606863b0e7b8edfad02467a4e63c6c68025ee)
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Implement early TPS6586X PMIC rail configuration setting SM0 being
VDD_CORE_1.2V to 1.2 volts and SM1 being VDD_CPU_1.0V to 1.0 volts.
While those are PMIC power-up defaults the SoC might have been reset
separately with certain rails being left at lower DVFS states which
is e.g. the case upon watchdog reset while otherwise nearly idling.
(cherry picked from commit f7c3186985ebb244d075b04ed7c055f39f485670)
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Enable the display driver on Apalis T30. Unfortunately the PWM pin
muxing wasn't any good neither which made that display stay dark.
(cherry picked from commit 2da21c1d130fa11a5bd9876c8e72fa0d57585106)
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On popular request enable the display driver on Colibri T30. A few
notes about some things encountered during porting: While analogue VGA
(e.g. via the on-carrier RAMDAC) worked just fine from the beginning
the EDT display flickered like crazy which turned out to be a pin
muxing issue. Unfortunately the PWM pin muxing wasn't any good neither
which made that display stay dark. Enjoy.
(cherry picked from commit 201cc6d4e4c8213fbd103e74b0f2f2ca591edf54)
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On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.
(cherry picked from commit 5a472ddd7a2a017747d6c05c65eba2cd3804c02f)
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Add a comment about the disabled PCIe port nodes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit f0adaf95b3edd1e8e23ebb0feab1f86eb77c9d84)
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Fix ULPI reset polarity which caused a hard hang on Colibri T20 upon
attempting to start the USB subsystem:
This fixes my late commit d5a24d8b53d350364bd429b7104ec369b817e4b8
(colibri_t20: fix usb operation and controller order) inadvertently
having overwritten Stephen's previous commit
2f6a7e8ce5df8b99d84bfd486c6f99d92322ce04 (ARM: tegra: fix USB ULPI PHY
reset signal inversion confusion).
While at it also fix comment about on-module USB port.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit 3f33bd299fd438a04d37c3c25af1ab02a9b0d2f9)
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Migrate Colibri T20 to U-Boot 2016.11.
(cherry picked from commit 92d747bf338ceb8d6dbdd3e5e5f7f72226ce0792)
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