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Set vidargs default to VGA resolution
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Make sure CMA memory is not greater than 50% of available physical
memory.
Allow user to change the CMA memory via 'cma-size' U-Boot environment
variable.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Trying to boot from an ext4 rootfs fails due to us defaulting to ext3.
While the downstream T20/T30 L4T kernel has issues with ext4 later TK1
L4T should work just fine with it. Hence enable ext4 for sdboot and
usbboot on TK1.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Using the SDP (Serial Download Protocol) in combination with some
USB hosts showed warnings such as:
EP0/out FAIL info=4018080 pg0=8df79500
ERROR: Unexpected report 4
at ../drivers/usb/gadget/f_sdp.c:327/sdp_rx_data_complete()
It seems that the descriptors are somehow not ready/overwritten
or similar. The exact cause and issue is not unterstood, but a
delay after handle_setup() seems to resolve the issue with three
different USB host machines which had previously shown the issue
regularly.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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If config block support is enabled, USB gadget modes unconditionally
use Toradex Product ID as USB PID. Some applications might prefer a
different and/or static USB PID. Add a Kconfig configuration option
to descide whether to use USB PID from config block or the fallback
config option CONFIG_G_DNL_PRODUCT_NUM.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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The OCRAM_S alias for Cortex-M4's system bus is missing. Add
the alias so that firmwares which have code linked in that
area can be loaded successfully.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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Use the same on-flash bad block table in U-Boot as we already
use/maintain in Linux.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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Add config option which allows to enable on flash bad block table
support. This effectively has the same effect as when using the
device tree property "nand-on-flash-bbt" in Linux.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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We have two commands to change the bootmode fuses:
mfgr_fuse which set fuse 0/5 and 0/6
and
updt_fuse which burns bit 4 of 0/5.
Before Image 2.6 we fused in mfgr_fuse 0x5062, which boots
from the user partition of the eMMC.
To workaround certain hangs we moved to fastboot mode and
using the first bootpartition of the eMMC requiring a fuse
value of 0x5072 which could be achived by the then added
updt_fuse command. At the same time the mfgr_fuse command
was changed to also fuse 0x5072, revert that second change
so that one can fuse both values, one with just mfgr_fuse
and the later with mfgr_fuse;updt_fuse.
Note that the mfgr_fuse command is only needed at module
production time, a customer might need to use updt_fuse
when upgrading an older module to be compatible with a
newer image. The command is integrated into the image
update scripts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Colibri iMX6 V1.1 HW can use the PMIC GEN3 to power the NVCC_SD1.
Change the settings fused into the PMIC's OTP to powerup with
GEN3 set to output 3.3V.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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The old geometry used to round down the ECC strength. This allows to
compile a U-Boot which has the same ECC format used in current Linux
kernels by adding this line to the board configuration header file:
#define CONFIG_NAND_MXS_BCH_LEGACY_GEO
Note that this leads to 14 bit ECC per 512 byte block, which requires
2149 bytes overall. The SoC's boot ROM is only able to handle pages
up to 2112 bytes, hence this format cannot be used for the boot/flash
configuration block (BCB/FCB).
Note that upstream Linux can also calculate ECC using JEDEC/ONFI
NAND chip parameters by using the fsl,use-minimum-ecc device tree
property.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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Discard the unused usdhc3_emmc_pads iomux table to prevent the following
build time warning:
u-boot-toradex.git/board/toradex/colibri_imx7/colibri_imx7.c:112:29:
warning: ‘usdhc3_emmc_pads’ defined but not used
[-Wunused-const-variable=]
static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
^~~~~~~~~~~~~~~~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Discard the unused vga_pads iomux table to prevent the following build
time warning:
u-boot-toradex.git/board/toradex/apalis_imx6/apalis_imx6.c:580:29:
warning: ‘vga_pads’ defined but not used [-Wunused-const-variable=]
static iomux_v3_cfg_t const vga_pads[] = {
^~~~~~~~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Make sure TPS62362 set 0 defaults to 1.200V as the Linux kernel may
switch to set 0 using TPS65911 GPIO1 (EN_CORE_DVFS_N) connected to
TPS62362 VSEL1 prior to actually setting it to a sane value dependent on
the current CPU frequency.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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With CONFIG_SPL_SILENT_CONSOLE the 'U-Boot SPL...' version string is
no longer linked into the SPL binary.
Factor out the version string and make sure that it is not optimize
away by lto.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits also on UARTs not used in the boot loader to prevent
an interrupt storm when Linux enables the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits to prevent an interrupt storm when Linux enables
the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This adds a Kconfig SPL_SILENCE_CONSOLE which allows to suppress any
console output which in the normal program flow is printed in the SPL.
Error messages and the likes will still be printed.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This adds a Kconfig DISABLE_CONSOLE_IN_SPL which allows to suppress any
console output in the SPL.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use i.MX bootaux support introduced for i.MX 6SoloX/i.MX 7 for
Vybrid too. Starting the Cortex-M4 core on Vybrid works a bit
differently, namely it uses a GPR register to define the initial
PC. There is no way to define the initial stack (the stack is
set up in a boot ROM). This is not a problem for most firmwares
since the firmwares startup code reinitialize the stack as part
of the firmware startup code anyway.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Move Freescale/NXP Vybrid to a standard arch/board approach, similar
to what has been done to i.MX 6 earlier in commit 89ebc82137be ("ARM:
mx6: move to a standard arch/board approach").
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Support elf firmware files for the auxiliary Cortex-M4 core. This
has the advantage that the user does not need to know to which
address the binary has been linked to. However, in order to load
the elf sections to the right address, we need to translate the
Cortex-M4 core memory addresses to primary/host CPU memory
addresses (U-Boot is typically running on the A7/A9 core). This
allows to boot firmwares from any location with just using
bootaux, e.g.:
tftp ${loadaddr} low_power_demo.elf && bootaux ${loadaddr}
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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For i.MX 6SoloX/i.MX 7 simple binary files are used to boot the
auxiliary CPU core (Cortex-M4). This patch moves the "parsing" of
this binary firmwares to the SoC independent code. This allows to
add different binary formats more easily.
While at it, also move the comment about the inner workings how
to boot the Cortex-M4 core to a more appropriate location.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use device-tree fixup to communicate the MTD partitions to the
kernel. Remove mtdparts from the kernel command line.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Disable 3.3V Ethernet and ARM rail when entering sleep mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Commit 3f353ceccbbb ("vf610: refactor DDRMC code") changed on-die
termination (ODT) values from 120 Ohm to 60 Ohm and enabled a static
read/write leveling which has not been tested with this board. This
commit reverts both changes and makes sure that memory gets
initialized as it has been done before the mentioned commit.
Fixes: 3f353ceccbbb ("vf610: refactor DDRMC code")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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This adds a command which parses the SPL version from eMMC and
optionally compares it against a version string.
Usage:
Colibri iMX6 # splver
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
Colibri iMX6 # splver "U-Boot SPL 2016" || echo update
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
Colibri iMX6 # splver "U-Boot SPL 2017" || echo update
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
update
Colibri iMX6 # splver "U-Boot SPL 2016.11-rc4" || echo update
U-Boot SPL 2016.11-rc3-00017-gdf36bb9-dirty (Nov 01 2016 - 12:31:34)
update
Colibri iMX6 #
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Implement board level USB PHY mode callback. On USB OTG Port 1
the Colibri standard foresees GPIO USBC_DET to decide whether the
port should run in Host or Device mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Enable Serial Download Protocol (SDP) in SPL. This is useful to
make use of imx_usb to download the complete U-Boot (u-boot.img)
after SPL has been downloaded.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Use a completely independent USB Product ID for SPL. This allows
to differentiate a SDP running in SPL and SDP running in a U-Boot
which could not read the config block successfully.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add USB serial download protocol support to SPL. If the SoC started
in recovery mode the SPL will immediately switch to SDP and wait for
further downloads/commands from the host side.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Before commit 81c4eccb55cc ("imx: mx6: fix USB bmode to use
reserved value") a non-reserved value has been used to trigger
Serial Downloader using bmode. On some boards this value lead to
unreliable bmode command. With the above mentioned commit, U-boot
switched to use [7:4] b0001, which translates to GPR9 0x10 for
Serial Downloader mode. Check for this new bmode and classify it
as Serial Downloader.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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When starting i.MX SoC's with BOOT_MODE b01, the boot ROM enteres
Serial Downloader mode. However, serial download does not necessarily
means booting from UART. The boot ROM also supports booting from USB.
Create a technology neutral boot mode called SDP (serial download
protocol).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Move the imximage.h header file to a common location so we can make
use of it from U-Boot too.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add new command to start USB Serial Download Protocol (SDP) state
machine.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Support U-Boot images in SPL (which makes it possible to download
u-boot.img) and U-Boot scripts in full U-Boot.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add SDP (Serial Downloader Protocol) implementation for U-Boot. The
protocol is used in NXP SoCs boot ROM and allows to download program
images. Beside that, it can also be used to read/write registers and
download complete Device Configuration Data (DCD) sets. Currently,
this implementation only supports downloading images and reading
registers.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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When booting we see:
DRAM: 256 MiB
<strange characters>FSL_SDHC: 0, FSL_SDHC: 1
auto-detected panel vga-rgb
The should be:
DRAM: 256 MiB
PMIC: device id: 0x10, revision id: 0x11, programmed
MMC: FSL_SDHC: 0, FSL_SDHC: 1
auto-detected panel vga-rgb
This seems to be caused by the call to initr_serial which
in our configuration goes into drivers/serial/serial-uclass.c
serial_initialize().
Printing an empty line helps. The empty line gets deleted and
no strange characters appear.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Keep debug code at the end of the function.
Use a one line informational message for the PMIC only.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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SATA is not accessible on the Colibri iMX6, so remove include and
conditionally executed code.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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We rely on u-boot to patch up the "fsl,vf610-ddrmc" node to have
the fsl,has-cke-reset-pulls property without which the Vybrid PM
code does not enable suspend to mem option. If Toradex config
block option is enabled, patch up the device tree for the same.
Signed-off-by: Sanchayan Maity <sanchayan.maity@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Fix the following boot hang observed when booting our downstream L4T
R16.5 based BSP:
[ 0.900129] kernel BUG at /build/linuxdev/oe-core_V2.7/build/tmp-
glibc/work-shared/colibri-t20/kernel-source/drivers/spi/spi-tegra.c:258!
[ 0.912478] Internal error: Oops - undefined instruction: 0 [#1]
PREEMPT SMP
[ 0.919525] Modules linked in:
[ 0.922586] CPU: 0 Not tainted (3.1.10-v2.7b1+g7e628fd #1)
[ 0.928428] PC is at spi_tegra_isr.part.0+0x14/0x18
[ 0.933310] LR is at spi_tegra_isr+0x38/0x7c
[ 0.937580] pc : [<c05c25e8>] lr : [<c0334d4c>] psr: 60000193
[ 0.937585] sp : c8075c40 ip : c8075c50 fp : c8075c4c
[ 0.949062] r10: c08a2f20 r9 : c08a2f74 r8 : 00000000
[ 0.954285] r7 : c8074000 r6 : c81545c0 r5 : c08a2f74 r4 : c81545b0
[ 0.960810] r3 : 00000000 r2 : 00000001 r1 : 60000193 r0 : 60000193
[ 0.967336] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM
Segment kernel
[ 0.974734] Control: 10c5387d Table: 0000404a DAC: 00000015
While at it also fix the following clock initialisation related errors:
[ 0.000000] tegra_dvfs: rate 216000000 too high for dvfs on sdmmc1
[ 0.000000] Unable to set clock sdmmc1 to rate 48000000: -22
[ 0.000000] tegra_dvfs: rate 216000000 too high for dvfs on sdmmc3
[ 0.000000] Unable to set clock sdmmc3 to rate 48000000: -22
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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The EFI loader is for most use cases not necessary so disable it
by default.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
(cherry picked from commit df9aa4068201394a9b2d7c30fbf34a815467c2d2)
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In the linux device tree we use 40Ohm drive strenght. So use the same
value in U-Boot.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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In the linux device tree we use 40Ohm drive strenght. So use the same
value in U-Boot.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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During porting to 2016.11 the check of a SD (mmc2) interface
was dropped, this was unintended.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Enable default boot command.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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