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2013-03-20am335x_evm:Add restore flash target and PG1.0 USB SPL support2013.01-am335x-ts1Steve Kipisz
This patch adds the make targets for PG1.0 - am335x_evm_uart_usbspl - am335x_evm_restore_flash_usbspl It also add the make target - am335x_evm_restore_flash Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2013-03-20am335x_evm:Add USB SPL restore flash optionSteve Kipisz
This patch adds a build target to build restore flash images that use a debrick script to restore flash over USB. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2013-03-20am335x_evm:fix mmc boot environment settingsSteve Kipisz
Original patch from arago-project.org u-boot-am33x [PATCH] am335x_evm: fix mmc boot environment settings Commit id: 3fdd541db2ad8202476ba2c5ef22ab034c85618d * Fixed the MMC boot environment settings to try first loading the uImage from the FAT partition instead of the ext2 partition. * Changed to load the kernel image a kloadaddr to avoid the need to relocate the kernel image during boot. * Added ip_method to mmcargs * Use bootargs_defaults to set common variables Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2013-03-20am335x_evm:Switch to ext3 for MMC SDSteve Kipisz
This patch originated in arago-project.org u-boot-am33x [PATCH] am335x_evm: Switch to ext3 for MMC/SD Commit id: a142e05ebe2e6eec1294c26dffbf5824a1f99d72 This is TI Sitara SDK specific change (we use ext3 for all SD cards). Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2013-03-20net:spl:add README file and sample debrick scriptsSteve Kipisz
This patch combines the patches mentioned below from arago-project.org u-boot-am33x [PATCH] net-spl: add README file and sample debrick scripts for NAND and SPI Commit: 013dd4fdd29d0bd2982e9e4e95d3e11092e906a3 Added README file with the description of required netboot / restore_flash setup as well as sample debrick scripts for NAND and SPI flash. and [PATCH] doc/am335x.net-spl/debrick-nand.txt: Remove nandecc statement Commit: fb27523feb7db4c2a96223b31e64d5a482ff27d5 Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2013-03-18Merge branch 'am335x-power-2013.01.01' into ↵Tom Rini
ti-u-boot-2013.01.01-amsdk-05.07.00.00
2013-03-15am335x: Enable DDR PHY dynamic power down bit for DDR3 boardshvaibhav@ti.com
Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-03-15am335x_evm: Add support for moving PG2.0 and later EVMs to 800MHzTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12Merge branch 'am335x-platform-2013.01.01' into ti-u-boot-2013.01.01Tom Rini
2013-03-12SPL: Fix build of CONFIG_SPL_NET_SUPPORTTom Rini
With CONFIG_SPL_NET_SUPPORT set we bring in most of the environment related code. This in turn means that while we discard the callback saftey checks in the environment, we had still needed their __start/__end linker symbols. In most cases this had been working because we generated u-boot.lst for the main U-Boot build prior to creating u-boot-spl.lds. With a sufficiently large machine this is not the case and exposed this latent bug which is that as of f8cfcf1 there are no callback linker entries so not __start/__end symbol was generated. As the environment is not user modifiable in this particular run-time (for any variable that had a callback associated with it) we simply provide an empty env_callback_init in SPL. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Scott Wood <scottwood@freescale.com> Tested-by: Tom Rini <trini@ti.com> (Ran with am335x_evm_usbspl build) Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2013-03-12env_callback: Mark find_env_callback as staticTom Rini
This is not called outside of env_callback.c so mark static, remove from <env_callback.h> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2013-03-12Merge branch 'am335x-power-2013.01.01' into ti-u-boot-2013.01.01Tom Rini
Conflicts: arch/arm/cpu/armv7/omap-common/boot-common.c board/ti/am335x/board.c Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12Merge branch 'am335x-connectivity-2013.01.01' into ti-u-boot-2013.01.01Tom Rini
2013-03-12Merge branch 'am335x-platform-2013.01.01' into ti-u-boot-2013.01.01Tom Rini
2013-03-12am335x_evm: Enable DFU for NAND and MMC, provide example alt_infosPantelis Antoniou
- Add CONFIG_DFU_NAND, CONFIG_DFU_MMC - Set dfu_alt_info_nand, dfu_alt_info_emmc and dfu_alt_info_mmc to show working examples for those cases. - Increase CONFIG_SYS_MAXARGS due to hush parsing bugs that would otherwise disallow 'setenv dfu_alt_info ${dfu_alt_info_nand}'. - Enable CONFIG_FAT_WRITE to allow updating on MMC Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12am335x_evm: Add CONFIG_CMD_MTDPARTS and relevant defaultsTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12am335x_evm: Define CONFIG_SYS_CACHELINE_SIZEPantelis Antoniou
drivers/usb/gadget/composite.c requires that this is defined early. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
2013-03-12dfu: NAND specific routines for DFU operationPantelis Antoniou
Support for NAND storage devices to work with the DFU framework. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12cmd_nand.c: Fix CONFIG_CMD_NAND_YAFFSTom Rini
The flag changed from WITH_INLINE_OOB to WITH_YAFFS_OOB by accident in 418396e. Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12nand: Extend nand_(read|write)_skip_bad with *actual and limit parametersTom Rini
We make these two functions take a size_t pointer to how much space was used on NAND to read or write the buffer (when reads/writes happen) so that bad blocks can be accounted for. We also make them take an loff_t limit on how much data can be read or written. This means that we can now catch the case of when writing to a partition would exceed the partition size due to bad blocks. To do this we also need to make check_skip_len count not just complete blocks used but partial ones as well. All callers of nand_(read|write)_skip_bad are adjusted to call these with the most sensible limits available. The changes were started by Pantelis and finished by Tom. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12dfu: Change indentation of defines in <dfu.h>Tom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12dfu: Support larger than memory transfers.Pantelis Antoniou
Previously we didn't support upload/download larger than available memory. This is pretty bad when you have to update your root filesystem for example. This patch removes that limitation (and the crashes when you transfered any file larger than 4MB) by making raw image writes be done in chunks and making file maximum size be configurable. The sequence number is a 16 bit counter; make sure we handle rollover correctly. This fixes the wrong transfers for large (> 256MB) images. Also utilize a variable to handle initialization, so that we don't rely on just the counter sent by the host. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12README: Document current DFU CONFIG optionsTom Rini
Add documentation for the current DFU config options. DFU is a standard USB device class so more information is available from usb.org Signed-off-by: Tom Rini <trini@ti.com>
2013-03-12usb: Fix bug when both DFU & ETHER are definedPantelis Antoniou
When both CONFIG_USB_GADGET & CONFIG_USB_ETHER are defined the makefile links objects twice. This patch uses a Makefile specific idiom of 'if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER)' to handle the case. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-03-08am33xx:ddr:Fix config_sdram to work for all DDRSteve Kipisz
The original write to sdram_config is correct for DDR3 but incorrect for DDR2 so SPL was hanging. For DDR2, the write to sdram_config should be after the writes to ref_ctrl. This was working for DDR3 because there was a write of 0x2800 to ref_ctrl before a write to sdram_config. Tested on: GP EVM 1.1A (DDR2), GP EVM 1.5A (DDR3), Beaglebone A6 (DDR2), Beagleone Blacd A4A (DDR3) Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2013-02-26am33xx: Update DDR3 EMIF configuration sequenceTom Rini
Based on http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips we need to re-work our sequence in config_sdram slightly to match what the TRM describes as the correct sequence. In our current (incorrect) sequence some edge cases may fail to initalize correctly. Signed-off-by: Tom Rini <trini@ti.com>
2013-02-26am335x_evm: Add am335x_evm_usbspl build targetTom Rini
We add USB (RNDIS gadget) SPL support as a separate target. We need to pull out YMODEM support in order to be a small enough target binary. Signed-off-by: Tom Rini <trini@ti.com>
2013-02-26am335x_evm: Never set CONFIG_EXTRA_ENV_SETTINGS in SPLTom Rini
Because of our support for network-based SPL, we don't discard all of the environment related functions. We however never make use of the default CONFIG_EXTRA_ENV_SETTINGS items and as this variable grows, it brings us closer to (or with some toolchains, over) our SPL size limit. Never set this in the case of SPL. Signed-off-by: Tom Rini <trini@ti.com>
2013-02-22AM335X: Set fdt_high for AM335X devices to enable booting with Device Treehvaibhav@ti.com
For AM335X boards, such as the EVM and Bone Linux kernel fails to locate the device tree blob on boot. The reason being is that u-boot is copying the DT blob to the upper part of RAM when booting the kernel and the kernel is unable to access the blob. By setting the fdt_high variable to 0xffffffff (to prevent the copy) the kernel is able to locate the DT blob and boot. This patch is tested on BeagleBone platform. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tom Rini <trini@ti.com>
2013-02-22am335x_evm: Add support for moving PG2.0 and later EVMs to 800MHzTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-22am335x: Enable DDR dynamic power down for DDR3 boardsSatyanarayana, Sandhya
This patch enables dynamically powering down the IO receiver when not performing a read. This optimizes both active and standby power consumption. This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB. Suggested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
2013-02-22am33xx: Add am33xx_spl_board_init function, call, scale core frequencyTom Rini
We need to allow for a further call-out in spl_board_init. For now, call this am33xx_spl_board_init. This function will depending on board see if we know how to scale the core frequency up to 720MHz. Signed-off-by: Tom Rini <trini@ti.com>
2013-02-22am33xx: Make mpu_pll_config callable outside clock.cTom Rini
As part of potentially scaling the core frequency up, this function needs to be visible elsewhere. Signed-off-by: Tom Rini <trini@ti.com>
2013-02-22am33xx: pmic: Add support for tps65217Joel A Fernandes
This is mostly copied from "support for TPS65217 PMIC" patches from the old am33xx U-boot tree by Greg Guyyote with additions by Tom Rini, me and others. [trini: Remove the change that ... Also drop DDR3 voltage level from 1.5V to 1.35V for beaglebone. DDR3 operation is verified at this lower voltage level.] Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-02-15arm: dra7xx: Add dra7xx_evm build supportLokesh Vutla
Adding the build support for dra7xx_evm. Reusing omap5_evm.h config by moving it to omap5_common.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com>
2013-02-15arm: dra7xx: Add board files for DRA7XX socsLokesh Vutla
Adding new board files for DRA7XX socs. The pad registers layout is changed completely from OMAP5 So introducing the new structure here and also adding the minimal data. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishant Kamat <nskamat@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15arm: dra7xx: Add DDR related data for DRA752 ES1.0Lokesh Vutla
DRA752 uses DDR3. Populating the corresponding structures with DDR3 data. Writing into MA registers if only MA is present in that soc. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15arm: dra7xx: Add control module changesLokesh Vutla
Control module register addresses are changed from OMAP5 to DRA7XX socs. So adding the necessary changes for the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15arm: dra7xx: clock: Add the dplls dataLokesh Vutla
A new DPLL DDR is added in DRA7XX socs. Now clocks to EMIF CD is from DPLL DDR. So DPLL DDR should be locked before initializing RAM. Also adding other dpll data which are different from OMAP5 ES2.0. SYS_CLK running at 20MHz is introduced in DRA7xx socs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15arm: dra7xx: clock: Add the prcm changesLokesh Vutla
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX. So adding the necessary register changes for DRA7XX socs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15arm: dra7xx: Add silicon id support for DRA752 socLokesh Vutla
Adding CPU detection support for the DRA752 ES1.0 soc. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP5: srcomp: enable slew rate compensation cells after powerupLokesh Vutla
After power-up SRCOMP cells are by-passed by default in OMAP5. Software has to enable these SRCOMP sells. For ES2: All 5 SRCOMP cells needs to be enabled. For ES1: Only 4 SRCOMP cells in core power domain are enabled. The 1 in wkup domain is not enabled because smart i/os of wkup domain work with default compensation code. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP5: Add DDR changes required for OMAP543X ES2.0 SOCsLokesh Vutla
Add pre calculated timing settings of LPDDR2 and DDR3 memories present in OMAP5430 and OMAP5432 ES2.0 versions. Also adding the DDR pad io settings required for OMAP543X SOCs here. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP4/5: clocks: Add the required OPP settings as per the latest addendumSRICHARAN R
Change OPP settings as per the latest 0.5 version of addendum for OMAP5430 ES2.0. omap4/hw_data.c is touched here to add dummy dividers. While here correcting OPP_NOM mpu, core frequency for OMAP4430 ES2.x Note that OMAP5430 ES1.0 support is still kept alive and would be removed in a cleanup later. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Nishanth Menon <nm@ti.com>
2013-02-15ARM: OMAP5: clock: Add the prcm register changes required for ES2.0SRICHARAN R
PRCM register addresses are changed from ES1.0 to ES2.0 due to PER power domain getting moved to CORE power domain. So adding the nessecary register changes for the same. Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP5: Add silicon id support for ES2.0 revision.SRICHARAN R
Adding the CPU detection suport for OMAP5430 and OMAP5432 ES2.0 SOCs. Signed-off-by: R Sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Nishanth Menon <nm@ti.com>
2013-02-15ARM: OMAP5: Clean up iosettings codeLokesh Vutla
There is some code duplication in the ddr io settings code. This is avoided by moving the data to a Soc specific place and letting the code generic. This avoids unnessecary code addition for future socs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP4+: Make control module register structure genericLokesh Vutla
A seperate omap_sys_ctrl_regs structure is defined for omap4 & 5. If there is any change in control module for any of the ES versions, a new structure needs to be created. In order to remove this dependency, making the register structure generic for all the omap4+ boards. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP4+: Cleanup emif specific filesLokesh Vutla
Removing the duplicated code in ddr3 initialization. Also creating structure for lpddr2 mode registers to avoid unnessecary revision checks. These change reduces code addition for future Socs. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-02-15ARM: OMAP4+: Clean up the pmic codeSRICHARAN R
The pmic code is duplicated for OMAP 4 and 5. Instead move the data to Soc specific place and share the code. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
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